Datasheet > PCA1550A-LF_10

PCA1550A-LF_10

更新时间： 2024-11-11 11:52:23

品牌	Logo	应用领域
ZCOMM		/
页数	文件大小	规格书
2页	70K
描述
PHASE LOCKED LOOP

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中文翻译

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数据手册

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PCA1550A-LF_10 数据手册

PCA1550A-LF

9939 Via Pasar • San Diego, CA 92126

TEL (858) 621-2700 FAX (858) 621-2722

PHASE LOCKED LOOP

Rev A1

PHASE NOISE (1 Hz BW, typical)

FEATURES

• Frequency Range: 1500 -

1600 MHz

KHz

• Step Size:

1000

•

- Style Package

CPLL

APPLICATIONS

• Satellite Communication Systems

• Point-to-Point Microwave Radio

•

VALUE

1500 - 1600

UNITS

MHz

PERFORMANCE SPECIFICATIONS

Frequency Range

-101

dBc/Hz

dBc

Phase Noise @ 10 kHz offset (1 Hz BW, typ.)

Harmonic Suppression (2nd, typ.)

Sideband Spurs (typ.)

-15

-70

dBc

Power Output

1.5±2.5

dBm

Load Impedance

Step Size

1000

1250

KHz

Charge Pump Output Current

Switching Speed (typ., adjacent channel)

Startup Lock Time (typ.)

mSec

°C

-40 to 85

Operating Temperature Range

Package Style

CPLL

POWER SUPPLY REQUIREMENTS

Supply Voltage (Vcc, nom.)

Supply Current (Icc, typ.)

Vdc

All specifications are typical unless otherwise noted and subject to change without notice.

APPLICATION NOTES

• AN-107 : How to Solder Z-COMM VCOs / PLLs

• AN-202 : PLL Functional Description

NOTES:

Reference Oscillator Signal: 5 MHz<

<100 MHz

Frequency Synthesizer: Analog Devices - ADF4113

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