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PALCE20V8H-15PI PDF预览

PALCE20V8H-15PI

更新时间： 2024-11-07 23:02:55
品牌 Logo 应用领域
超微 - AMD 可编程逻辑光电二极管时钟
页数 文件大小 规格书
16页 169K
描述
EE CMOS 24-Pin Universal Programmable Array Logic

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中文翻译

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PALCE20V8H-15PI 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：DIP包装说明：DIP, DIP24,.3
针数：24Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.74
其他特性：PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; SHARED INPUT/CLOCK; 1 EXTERNAL CLOCK架构：PAL-TYPE
最大时钟频率：45.5 MHzJESD-30 代码：R-PDIP-T24
JESD-609代码：e0长度：30.734 mm
专用输入次数：12I/O 线路数量：8
输入次数：20输出次数：8
产品条款数：64端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
组织：12 DEDICATED INPUTS, 8 I/O输出函数：MACROCELL
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP24,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 V可编程逻辑类型：EE PLD
传播延迟：15 ns认证状态：Not Qualified
座面最大高度：5.08 mm子类别：Programmable Logic Devices
最大供电电压：5.5 V最小供电电压：4.5 V
标称供电电压：5 V表面贴装：NO
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.62 mm
Base Number Matches：1

PALCE20V8H-15PI 数据手册

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FINAL  
COM’L: H-5/7/10/15/25, Q-10/15/25  
IND: H-15/25, Q-20/25  
Advanced  
Micro  
PALCE20V8 Family  
EE CMOS 24-Pin Universal Programmable Array Logic  
Devices  
DISTINCTIVE CHARACTERISTICS  
■ Pin and function compatible with all GAL  
20V8/As  
■ Peripheral Component Interconnect (PCI)  
compliant  
■ Electrically erasable CMOS technology pro-  
vides reconfigurable logic and full testability  
■ High-speed CMOS technology  
— 5-ns propagation delay for “-5” version  
■ Preloadable output registers for testability  
■ Automatic register reset on power-up  
■ Cost-effective 24-pin plastic SKINNYDIP and  
28-pin PLCC packages  
■ Extensive third-party software and programmer  
support through FusionPLD partners  
■ Fully tested for 100% programming and func-  
tional yields and high reliability  
■ Programmable output polarity  
■ 5-ns version utilizes a split leadframe for  
improved performance  
— 7.5-ns propagation delay for “-7” version  
■ Direct plug-in replacement for a wide range of  
24-pin PAL devices  
■ Programmable enable/disable control  
■ Outputs individually programmable as  
registered or combinatorial  
GENERAL DESCRIPTION  
The PALCE20V8 is an advanced PAL device built with  
low-power, high-speed, electrically-erasable CMOS  
technology. Its macrocells provide a universal device  
architecture. The PALCE20V8 is fully compatible with  
the GAL20V8 and can directly replace PAL20R8 series  
devices and most 24-pin combinatorial PAL devices.  
complex logic functions easily and efficiently. Multiple  
levels of combinatorial logic can always be reduced to  
sum-of-products form, taking advantage of the very  
wide input gates available in PAL devices. The equa-  
tions are programmed into the device through floating-  
gate cells in the AND logic array that can be erased  
electrically.  
Devicelogicisautomaticallyconfiguredaccordingtothe  
user’s design specification. A design is implemented  
using any of a number of popular design software pack-  
ages, allowing automatic creation of a programming file  
based on Boolean or state equations. Design software  
also verifies the design and can provide test vectors for  
the finished device. Programming can be accomplished  
on standard PAL device programmers.  
The fixed OR array allows up to eight data product terms  
per output for logic functions. The sum ofthese products  
feeds the output macrocell. Each macrocell can be  
programmed as registered or combinatorial with an  
active-high or active-low output. The output configura-  
tion is determined by two global bits and one local bit  
controlling four multiplexers in each macrocell.  
The PALCE20V8 utilizes the familiar sum-of-products  
(AND/OR) architecture that allows users to implement  
I1 – I10  
CLK/I0  
BLOCK DIAGRAM  
10  
Programmable AND Array  
40 x 64  
Input  
Mux.  
Input  
Mux.  
MACRO  
MC0  
MACRO  
MC1  
MACRO  
MC2  
MACRO  
MC3  
MACRO  
MC4  
MACRO  
MC5  
MACRO  
MC6  
MACRO  
MC7  
I/O6  
OE/I11 I12  
I/O0  
I/O1  
I/O2  
I/O4  
I/O4  
I/O7  
I13  
I/O5  
16491D-1  
Publication# 16491 Rev. D Amendment/0  
Issue Date: February 1996  
2-155  
1234567...16

中文翻译

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PALCE20V8H-15PI 替代型号

型号 品牌 替代类型 描述 数据表
PALCE20V8H-15PC AMD

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