5秒后页面跳转
捷配首页

Datasheet > PAL16R8-5JC
PAL16R8-5JC PDF预览

PAL16R8-5JC

更新时间： 2024-11-24 04:54:23
品牌 Logo 应用领域
超微 - AMD 可编程逻辑输入元件时钟
页数 文件大小 规格书
33页 218K
描述
20-Pin TTL Programmable Array Logic

阅读下载

中文翻译

获取价格

PAL16R8-5JC 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QLCC包装说明：QCCJ, LDCC20,.4SQ
针数：20Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.65
Is Samacsys：N其他特性：POWER-UP RESET; REGISTER PRELOAD; 1 EXTERNAL CLOCK
架构：PAL-TYPE最大时钟频率：117 MHz
JESD-30 代码：S-PQCC-J20JESD-609代码：e0
长度：8.9662 mm专用输入次数：8
I/O 线路数量：输入次数：8
输出次数：8产品条款数：64
端子数量：20最高工作温度：75 °C
最低工作温度：组织：8 DEDICATED INPUTS, 0 I/O
输出函数：REGISTERED封装主体材料：PLASTIC/EPOXY
封装代码：QCCJ封装等效代码：LDCC20,.4SQ
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
可编程逻辑类型：OT PLD传播延迟：6.5 ns
认证状态：Not Qualified座面最大高度：4.57 mm
子类别：Programmable Logic Devices最大供电电压：5.25 V
最小供电电压：4.75 V标称供电电压：5 V
表面贴装：YES技术：TTL
温度等级：COMMERCIAL EXTENDED端子面层：Tin/Lead (Sn/Pb)
端子形式：J BEND端子节距：1.27 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：8.9662 mmBase Number Matches：1

PAL16R8-5JC 数据手册

 浏览型号PAL16R8-5JC的Datasheet PDF文件第2页浏览型号PAL16R8-5JC的Datasheet PDF文件第3页浏览型号PAL16R8-5JC的Datasheet PDF文件第4页浏览型号PAL16R8-5JC的Datasheet PDF文件第5页浏览型号PAL16R8-5JC的Datasheet PDF文件第6页浏览型号PAL16R8-5JC的Datasheet PDF文件第7页 
FINAL  
COM’L: -4/5/7/B/B-2/A, D/2  
Advanced  
Micro  
PAL16R8 Family  
20-Pin TTL Programmable Array Logic  
Devices  
DISTINCTIVE CHARACTERISTICS  
■ As fast as 4.5 ns maximum propagation delay  
■ Power-up reset for initialization  
■ Popular 20-pin architectures: 16L8, 16R8, 16R6,  
■ Extensive third-party software and programmer  
16R4  
support through FusionPLD partners  
■ Programmable replacement for high-speed TTL  
■ 20-Pin DIP and PLCC packages save space  
logic  
■ 28-Pin PLCC-4 package provides ultra-clean  
■ Register preload for testability  
high-speed signals  
GENERAL DESCRIPTION  
The PAL16R8 Family (PAL16L8, PAL16R8, PAL16R6,  
PAL16R4) includes the PAL16R8-5/4 Series which pro-  
vides the highest speed in the 20-pin TTL PAL device  
family, making the series ideal for high-performance ap-  
plications. The PAL16R8 Family is provided with stan-  
dard 20-pin DIP and PLCC pinouts and a 28-pin PLCC  
pinout. The 28-pin PLCC pinout contains seven extra  
ground pins interleaved between the outputs to reduce  
noise and increase speed.  
The AND array is programmed to create custom product  
terms, while the OR array sums selected terms at the  
outputs.  
In addition, the PAL device provides the following  
options:  
— Variable input/output pin ratio  
— Programmable three-state outputs  
— Registers with feedback  
The devices provide user-programmable logic for re-  
placing conventional SSI/MSI gates and flip-flops at a  
reduced chip count.  
Product terms with all connections opened assume the  
logicalHIGHstate;producttermsconnectedtobothtrue  
and complement of any single input assume the logical  
LOW state. Registers consist of D-type flip-flops that are  
loaded on the LOW-to-HIGH transition of the clock. Un-  
used input pins should be tied to VCC or GND.  
The family allows the systems engineer to implement  
the design on-chip, by opening fuse links to configure  
AND and OR gates within the device, according to the  
desired logic function. Complex interconnections be-  
tween gates, which previously required time-consuming  
layout, are lifted from the PC board and placed on sili-  
con, where they can be easily modified during proto-  
typing or production.  
The entire PAL device family is supported by the  
FusionPLD partners. The PAL family is programmed on  
conventionalPALdeviceprogrammerswithappropriate  
personality and socket adapter modules. Once the PAL  
device is programmed and verified, an additional con-  
nection may be opened to prevent pattern readout. This  
feature secures proprietary circuits.  
The PAL device implements the familiar Boolean logic  
transfer function, the sum of products. The PAL device  
is a programmable AND array driving a fixed OR array.  
PRODUCT SELECTOR GUIDE  
Dedicated  
Product Terms/  
Device  
Inputs  
Outputs  
Output  
Feedback  
Enable  
PAL16L8  
10  
6 comb.  
2 comb.  
7
7
I/O  
–
prog.  
prog.  
PAL16R8  
PAL16R6  
8
8
8 reg.  
8
reg.  
pin  
6 reg.  
2 comb.  
8
7
reg.  
I/O  
pin  
prog.  
PAL16R4  
8
4 reg.  
4 comb.  
8
7
reg.  
I/O  
pin  
prog.  
Publication# 16492 Rev. D Amendment/0  
Issue Date: February 1996  
2-3  
1234567...33

中文翻译

下载PDF

与PAL16R8-5JC相关器件

型号 品牌 获取价格 描述 数据表
PAL16R8-5JCT CYPRESS

获取价格

 		OT PLD, 6ns, BICMOS, PQCC20, PLASTIC, LCC-20
PAL16R8-5LC CYPRESS

获取价格

 		OT PLD, 5ns, BICMOS, CQCC20, CERAMIC, LCC-20
PAL16R8-5PC AMD

获取价格

 		20-Pin TTL Programmable Array Logic
PAL16R8-7 AMD

获取价格

 		20-Pin TTL Programmable Array Logic
PAL16R8-72DC AMD

获取价格

 		20-Pin TTL Programmable Array Logic
PAL16R8-72JC AMD

获取价格

 		20-Pin TTL Programmable Array Logic
PAL16R8-72PC AMD

获取价格

 		20-Pin TTL Programmable Array Logic
PAL16R8-7DC AMD

获取价格

 		20-Pin TTL Programmable Array Logic
PAL16R8-7DMB ETC

获取价格

 		Fuse-Programmable PLD
PAL16R8-7JC AMD

获取价格

 		20-Pin TTL Programmable Array Logic

与PAL16R8-5JC相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证