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P89LPC920FDH PDF预览

P89LPC920FDH

更新时间： 2024-10-26 22:07:23
品牌 Logo 应用领域
恩智浦 - NXP 微控制器和处理器外围集成电路光电二极管时钟
页数 文件大小 规格书
45页 801K
描述
8-bit microcontrollers with two-clock 80C51 core 2 kB/4 kB/8 kB 3 V low-power Flash with 256-byte data RAM

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P89LPC920FDH 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：4.40 MM, PLASTIC, MO-153, SOT-360-1, TSSOP-20针数：20
Reach Compliance Code：compliantHTS代码：8542.31.00.01
风险等级：5.81Is Samacsys：N
具有ADC：NO其他特性：OPERATES AT 2.4V MINIMUM SUPPLY @ 12 MHZ
地址总线宽度：位大小：8
CPU系列：8051最大时钟频率：18 MHz
DAC 通道：NODMA 通道：NO
外部数据总线宽度：JESD-30 代码：R-PDSO-G20
JESD-609代码：e4长度：6.5 mm
湿度敏感等级：2I/O 线路数量：18
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °CPWM 通道：YES
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP20,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
电源：2.5/3.3 V认证状态：Not Qualified
RAM（字节）：256ROM（单词）：2048
ROM可编程性：FLASH座面最大高度：1.1 mm
速度：18 MHz子类别：Microcontrollers
最大压摆率：18 mA最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：NICKEL PALLADIUM GOLD
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：4.4 mmuPs/uCs/外围集成电路类型：MICROCONTROLLER
Base Number Matches：1

P89LPC920FDH 数据手册

 浏览型号P89LPC920FDH的Datasheet PDF文件第2页浏览型号P89LPC920FDH的Datasheet PDF文件第3页浏览型号P89LPC920FDH的Datasheet PDF文件第4页浏览型号P89LPC920FDH的Datasheet PDF文件第5页浏览型号P89LPC920FDH的Datasheet PDF文件第6页浏览型号P89LPC920FDH的Datasheet PDF文件第7页 
P89LPC920/921/922  
8-bit microcontrollers with two-clock 80C51 core  
2 kB/4 kB/8 kB 3 V low-power Flash with 256-byte data RAM  
Rev. 06 — 21 November 2003  
Product data  
1. General description  
The P89LPC920/921/922 are single-chip microcontrollers designed for applications  
demanding high-integration, low cost solutions over a wide range of performance  
requirements. The P89LPC920/921/922 is based on a high performance processor  
architecture that executes instructions in two to four clocks, six times the rate of  
standard 80C51 devices. Many system-level functions have been incorporated into  
the P89LPC920/921/922 in order to reduce component count, board space, and  
system cost.  
2. Features  
2.1 Principal features  
■ 2 kB/4 kB/8 kB Flash code memory with 1 kB erasable sectors, 64-byte erasable  
page size, and single byte erase.  
■ 256-byte RAM data memory.  
■ Two 16-bit counter/timers. Each timer may be configured to toggle a port output  
upon timer overflow or to become a PWM output.  
■ Real-Time clock that can also be used as a system timer.  
■ Two analog comparators with selectable inputs and reference source.  
■ Enhanced UART with fractional baud rate generator, break detect, framing error  
detection, automatic address detection and versatile interrupt capabilities.  
■ 400 kHz byte-wide I2C-bus communication port.  
■ Configurable on-chip oscillator with frequency range and RC oscillator options  
(selected by user programmed Flash configuration bits). The RC oscillator option  
allows operation without external oscillator components. Oscillator options  
support frequencies from 20 kHz to the maximum operating frequency of 12 MHz.  
The RC oscillator option is selectable and fine tunable.  
■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or  
driven to 5.5 V).  
■ 15 I/O pins minimum. Up to 18 I/O pins while using on-chip oscillator and reset  
options.  
2.2 Additional features  
■ 20-pin TSSOP and DIP packages.  
■ A high performance 80C51 CPU provides instruction cycle times of 167 ns to  
333 ns for all instructions except multiply and divide when executing at 12 MHz.  
This is 6 times the performance of the standard 80C51 running at the same clock  
frequency. A lower clock frequency for the same performance results in power  
savings and reduced EMI.  
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