Datasheet > P702-06SC

P702-06SC

更新时间： 2024-02-03 19:54:26

品牌	Logo	应用领域
PLL		时钟发生器
页数	文件大小	规格书
8页	279K
描述
Clock Generator for Printer Applications

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中文翻译

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数据手册

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P702-06SC 数据手册

PLL702-06

Clock Generator for Printer Applications

FEATURES

PIN CONFIGURATION

•

1 CPU Clock output with selectable frequencies (50,

XIN

XOUT

VDDA

FS0^T

66.67, 75, 80, 83.3, 90, 100,125 or 133 MHz).

1 Selectable 48, 30 or 12MHz USB Clock output.

Selectable Spread Spectrum (SST) for EMI reduction

on CPU clock.

FS1^T

•

SS0^

SS1^

GNDA

GNDD

GNDCPU

CPU

VDDD

GNDUSB

VDDUSB

USB/USB_SEL^T*

VDDCPU

•

PowerPC compatible CPU Clock.

Advanced, low power, sub-micron CMOS processes.

14.31818MHz fundamental crystal input.

3.3V and/or 2.5V operation.

Available in 16-Pin 150mil SOP.

Note

^: Internal pull-up resistor

*: Bi-directional pin

: Tri-level Input

CPU CLOCK FREQUENCY TABLE

DESCRIPTION

The PLL702-06 is a low cost, low jitter, and high

FS1

FS0

CPU (MHz)

performance clock synthesizer for generic Printer

applications. It provides one CPU clock and a selectable

48, 30 or 12MHz (USB) output. The user can choose

among 9 different clock frequencies and 3-selectable down-

spread Spread Spectrum modulation to reduce EMI on

CPU clock. All frequencies are generated from a single low

cost 14.31818MHz crystal. CPU clock can be driven from

an independent 2.5V or 3.3V power supply.

66.67

83.33

90*

100

125

133*

*Notes: Actual CPU frequency for 90Mhz is 88.88Mhz, 133Mhz is 130.9Mhz

BLOCK DIAGRAM

Control

USB_SEL

Logic

VDDUSB

USB

XIN

XTAL

OSC

PLL

XOUT

VDDCPU

CPU

PLL

SST

SS(0:1)

FS(0:1)

Control

Logic

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 10/26/05 Page 1

12 3 4 5 6 7 8

中文翻译

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