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P5CC081HN PDF预览

P5CC081HN

更新时间: 2024-11-07 09:56:03
品牌 Logo 应用领域
恩智浦 - NXP 控制器
页数 文件大小 规格书
20页 151K
描述
Secure dual interface and contact PKI smart card controller

P5CC081HN 技术参数

生命周期:Active零件包装代码:QFN
包装说明:5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, SOT617-3, HVQFN-32针数:32
Reach Compliance Code:compliantHTS代码:8542.31.00.01
风险等级:5.63其他特性:ALSO OPERATES AT 3V, 5V SUPPLY
JESD-30 代码:S-PQCC-N32长度:5 mm
端子数量:32最高工作温度:85 °C
最低工作温度:-25 °C封装主体材料:PLASTIC/EPOXY
封装代码:QCCN封装等效代码:LCC32,.2SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER
电源:1.8/5 V认证状态:Not Qualified
子类别:Other Microprocessor ICs最大供电电压:1.98 V
最小供电电压:1.62 V标称供电电压:1.8 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
宽度:5 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR CIRCUIT
Base Number Matches:1

P5CC081HN 数据手册

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P5CD016/021/041/051 and  
P5Cx081 family  
Secure dual interface and contact PKI smart card controller  
Rev. 3.2 — 14 March 2011  
150332  
Product short data sheet  
PUBLIC  
1. General description  
1.1 CMOS14 SmartMX family features overview  
The CMOS14 SmartMX family members are a modular set of devices featuring:  
16 KB, 20 KB, 40 KB, 52 KB and 80 KB EEPROM  
ROM memory size extended to 264 KB  
RAM memory size extended to 7.5 KB (CXRAM 5 KB, FXRAM 2.5 KB)  
High-performance secure Public Key Infrastructure (PKI) coprocessor (RSA, ECC)  
Secure dual/triple-DES coprocessor  
Secure AES coprocessor  
Memory Management Unit (MMU)  
ISO/IEC 7816 contact interface  
Optional ISO/IEC 14443 A Contactless Interface Unit (CIU)  
EEPROM with typically 500000 cycles endurance and a minimum of 25 years  
retention time  
Broad spectrum of delivery types  
Optional certified crypto library modules for RSA, ECC, DES, AES, SHA and PRNG  
The P5CD016/041/051 and P5Cx081 products provide improved SmartMX family  
performance with the following additional features:  
CPU kernel accelerated by factor 2, at the same time maintaining full instruction  
compatibility  
FameXE coprocessor (clock up to 72 MHz) with reduced power consumption in all  
three voltage classes  
Memory Management Unit (MMU) with 8 instead of 5 cache segments  
Full binary ROM Code compatibility to P5Cx012/02x/040/073/080/144 family  
1.2 CMOS14 SmartMX family properties  
The long-established CMOS14 SmartMX family features a significantly enhanced secure  
smart card IC architecture. Extended instructions for Java and C code, linear addressing,  
high speed at low power and a universal memory management unit are among many  
other improvements added to the classic 80C51 core architecture. In the  
P5CD016/041/051 and P5Cx081 product family, NXP Semiconductors’ proven  

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