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P4C167L-35PI PDF预览

P4C167L-35PI

更新时间: 2024-02-01 04:47:50
品牌 Logo 应用领域
PYRAMID 存储内存集成电路静态存储器
页数 文件大小 规格书
10页 192K
描述
Standard SRAM, 16KX1, 35ns, CMOS, PDIP20, 0.300 INCH, PLASTIC, DIP-20

P4C167L-35PI 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:DIP
包装说明:DIP,针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.75
最长访问时间:35 nsJESD-30 代码:R-PDIP-T20
JESD-609代码:e0长度:25.908 mm
内存密度:16384 bit内存集成电路类型:STANDARD SRAM
内存宽度:1功能数量:1
端子数量:20字数:16384 words
字数代码:16000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:16KX1封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:5.334 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

P4C167L-35PI 数据手册

 浏览型号P4C167L-35PI的Datasheet PDF文件第3页浏览型号P4C167L-35PI的Datasheet PDF文件第4页浏览型号P4C167L-35PI的Datasheet PDF文件第5页浏览型号P4C167L-35PI的Datasheet PDF文件第7页浏览型号P4C167L-35PI的Datasheet PDF文件第8页浏览型号P4C167L-35PI的Datasheet PDF文件第9页 
P4C167  
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE CONTROLLED)(9)  
AC TEST CONDITIONS  
TRUTH TABLE  
Mode  
Standby  
Read  
CE  
H
L
WE  
X
H
Output  
High Z  
DOUT  
Power  
Standby  
Active  
Input Pulse Levels  
GND to 3.0V  
Input Rise and Fall Times  
Input Timing Reference Level  
Output Timing Reference Level  
Output Load  
3ns  
1.5V  
1.5V  
Write  
L
L
High Z  
Active  
See Figures 1 and 2  
Figure 2. Thevenin Equivalent  
Figure 1. Output Load  
* including scope and test fixture.  
Note:  
proper termination must be used; for example, a 50test environment  
should be terminated into a 50load with 1.73V (Thevenin Voltage) at  
the comparator input, and a 116resistor must be used in series with  
DOUT to match 166(Thevenin Resistance).  
Due to the ultra-high speed of the P4C167/L, care must be taken when  
testing this device; an inadequate setup can cause a normal functioning  
part to be rejected as faulty. Long high-inductance leads that cause  
supply bounce must be avoided by bringing the VCC and ground planes  
directly up to the contactor fingers. A 0.01 µF high frequency capacitor  
is also required between VCC and ground. To avoid signal reflections,  
Document # SRAM106 REV A  
Page 6 of 10  

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