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P4C1256L-20SSILF PDF预览

P4C1256L-20SSILF

更新时间: 2024-01-19 00:54:16
品牌 Logo 应用领域
PYRAMID 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
16页 1155K
描述
Standard SRAM, 32KX8, 20ns, CMOS, PDSO28, 0.300 INCH, ROHS COMPLIANT, PLASTIC, SOP-28

P4C1256L-20SSILF 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:SOIC包装说明:SOP,
针数:28Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.41
风险等级:5.56最长访问时间:20 ns
JESD-30 代码:R-PDSO-G28JESD-609代码:e3
长度:17.9324 mm内存密度:262144 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:28
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:32KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:2.794 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5057 mm
Base Number Matches:1

P4C1256L-20SSILF 数据手册

 浏览型号P4C1256L-20SSILF的Datasheet PDF文件第3页浏览型号P4C1256L-20SSILF的Datasheet PDF文件第4页浏览型号P4C1256L-20SSILF的Datasheet PDF文件第5页浏览型号P4C1256L-20SSILF的Datasheet PDF文件第7页浏览型号P4C1256L-20SSILF的Datasheet PDF文件第8页浏览型号P4C1256L-20SSILF的Datasheet PDF文件第9页 
P4C1256 - HIGH SPEED 32K X 8 STATIC CMOS RAM  
TIMIꢀꢁ WAVEFORM OF WRITE CYCLE ꢀO. 2 (CE COꢀTROLLED)(10)  
AC TEST COꢀDITIOꢀS  
Input Pulse Levels  
TRUTH TABLE  
GND to 3.0V  
Mode  
CE  
H
L
OE  
X
WE  
X
I/O  
Power  
Standby  
Active  
Input Rise and Fall Times  
Input Timing Reference Level  
Output Timing Reference Level  
Output Load  
3ns  
1.5V  
Standby  
DOUT Disabled  
Read  
High Z  
High Z  
DOUT  
H
H
1.5V  
L
L
H
Active  
See Figures 1 and 2  
Write  
L
X
L
High Z  
Active  
Figure 1. Output Load  
Figure 2. Thevenin Equivalent  
* including scope and test fixture.  
ꢀote:  
Becauseoftheultra-highspeedoftheP4C1256,caremustbetakenwhen  
testing this device; an inadequate setup can cause a normal function-  
ing part to be rejected as faulty. Long high-inductance leads that cause  
supply bounce must be avoided by bringing the VCC and ground planes  
directly up to the contactor fingers. A 0.01 µF high frequency capacitor  
is also required between VCC and ground. To avoid signal reflections,  
proper termination must be used; for example, a 50Ω test environment  
should be terminated into a 50Ω load with 1.73V (Thevenin Voltage) at  
the comparator input, and a 116Ω resistor must be used in series with  
DOUT to match 166Ω (Thevenin Resistance).  
Document # SRAM119 REV I  
Page 6  

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