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P24C64G PDF预览

P24C64G

更新时间: 2024-11-06 17:01:03
品牌 Logo 应用领域
普冉 - PUYA /
页数 文件大小 规格书
27页 1366K
描述
SOP8(150 mil),TSSOP8,DFN8(3*2*0.75),UDFN8(3*2*0.5),MSOP8,DPIP8

P24C64G 数据手册

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P24C64G  
I2C-Compatible Serial E2PROM  
Datasheet Rev.1.2  
General Description  
The P24C64G is I2C-compatible Serial EEPROM (Electrically Erasable Programmable Memory) device. It  
contains a memory array of 64 Kbits (8 Kbytes), which is organized in 32 bytes per page.  
Features  
Single Supply Voltage and High Speed Mode  
Minimum operating voltage down to 1.65V  
400kHz/1MHz clock from 1.65 V to 3.6 V  
3.4MHz clock from 1.65V to 3.6V  
Low power CMOS technology  
Read current 0.15mA (400kHz, typical)  
Schmitt Trigger, Filtered Inputs for Noise Suppression  
Transparent ECC on each group of four bytes which can correct 1 bit error  
Additional write lockable page (Identification page)  
Additional 128 bits Serial Number (Unique ID)  
Additional Write Lockable Page  
32 bytes Page Write Modes, Partial Page Writes Allowed  
Write protect of the whole memory array  
Self-timed Write Cycle (5ms maximum)  
High Reliability  
Endurance:  
Data Retention:  
HBM:  
1 Million Write Cycles  
100 Years  
4 kV  
Latch up Capability:  
Package:  
+/- 200mA(25C)  
PDIP8,SOP8,MSOP8,TSSOP8,DFN8 and UDFN8  
1. Pin Configuration  
1.1 Pin Configuration  
Figure 1-1 Pin Configuration  
1/27  

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