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P2103HVG PDF预览

P2103HVG

更新时间: 2024-11-16 03:44:19
品牌 Logo 应用领域
其他 - ETC 晶体晶体管场效应晶体管
页数 文件大小 规格书
5页 355K
描述
Dual N-Channel Enhancement Mode Field Effect Transistor

P2103HVG 数据手册

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P2103HVG  
SOP-8  
NIKO-SEM  
Dual N-Channel Enhancement Mode  
Field Effect Transistor  
Lead-Free  
PRODUCT SUMMARY  
V(BR)DSS  
RDS(ON)  
ID  
G : GATE  
30  
7A  
21mΩ  
D : DRAIN  
S : SOURCE  
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)  
PARAMETERS/TEST CONDITIONS  
SYMBOL  
LIMITS  
UNITS  
Drain-Source Voltage  
VDS  
30  
V
V
Gate-Source Voltage  
VGS  
±20  
TC = 25 °C  
TC = 70 °C  
7
Continuous Drain Current  
Pulsed Drain Current1  
ID  
6
A
IDM  
PD  
40  
2
TC = 25 °C  
TC = 70 °C  
Power Dissipation  
W
1.3  
Junction & Storage Temperature Range  
Lead Temperature (1/16” from case for 10 sec.)  
Tj, Tstg  
TL  
-55 to 150  
275  
°C  
THERMAL RESISTANCE RATINGS  
THERMAL RESISTANCE  
SYMBOL  
TYPICAL  
MAXIMUM  
62.5  
UNITS  
°C / W  
Junction-to-Ambient  
RθJA  
1Pulse width limited by maximum junction temperature.  
2Duty cycle 1%  
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)  
LIMITS  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
STATIC  
GS = 0V, ID = 250µA  
DS = VGS, ID = 250µA  
UNIT  
MIN TYP MAX  
Drain-Source Breakdown Voltage  
Gate Threshold Voltage  
Gate-Body Leakage  
V(BR)DSS  
VGS(th)  
IGSS  
30  
V
V
1
1.5  
3
V
VDS = 0V, VGS = ±20V  
VDS = 24V, VGS = 0V  
±100 nA  
1
Zero Gate Voltage Drain Current  
IDSS  
µA  
10  
VDS = 20V, VGS = 0V, TJ = 55 °C  
Jun-29-2004  
1

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