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OXFW900 PDF预览

OXFW900

更新时间: 2024-01-01 04:13:58
品牌 Logo 应用领域
其他 - ETC /
页数 文件大小 规格书
30页 187K
描述
IEEE1394 to ATA/ATAPI Native Bridge

OXFW900 技术参数

生命周期:Obsolete包装说明:QFP, TQFP128,.63SQ,16
Reach Compliance Code:unknown风险等级:5.81
JESD-30 代码:S-PQFP-G128端子数量:128
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:TQFP128,.63SQ,16封装形状:SQUARE
封装形式:FLATPACK电源:3.3 V
认证状态:Not Qualified子类别:Bus Controllers
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.4 mm
端子位置:QUADBase Number Matches:1

OXFW900 数据手册

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OXFW900  
OXFORD SEMICONDUCTOR LTD.  
3 PIN DESCRIPTIONS  
1394 PHY-LINK interface  
104, 105, 108, 109, 110, 111, 115,  
Dir1  
I/O  
Name  
PD[7:0]  
Description  
Phy-Link Data Bus  
116  
117,118  
120  
122  
102  
I/O  
I
O
IU  
O
CTL[1:0]  
PHYCLK  
LREQ  
LINKON  
LPS  
Phy-Link Control Bus  
49.152 MHz clock sourced by PHY  
Link Request  
Requests link to power up when in a low power mode  
Indicates to phy that link is powered and ready  
103  
ARM external interface  
2, 3, 4, 5, 6, 7, 10, 11, 12, 13, 14,  
15, 18, 19, 20, 21  
35, 36, 37, 40, 41, 42, 43, 44, 45,  
48, 49, 50, 51, 52, 53, 54, 60  
25, 26, 29, 30  
T_I/O D[15:0]  
T_O A[16:0]  
T_O CS#[3:0]  
T_O OE#  
ARM external data bus  
ARM external address bus  
ARM external chip selects. CS0# is always used for program  
ROM.  
ARM external output enable. Active when reading data from  
external devices including program ROM  
Byte Write enables. For future expansion  
Write Enable. Active when writing to external devices  
31  
32, 33  
34  
T_O BWR#[1:0]  
T_O WE#  
62  
ID  
WIDTH16  
‘1’ = 16 bit external ROM  
(pulldown)  
‘0’ = 8 bit external ROM  
61  
IDE interface  
65, 66, 69, 70, 71, 72, 73, 74, 77,  
78, 79, 80, 81, 82, 85, 86  
97, 98, 99  
T_IU INT#  
External ARM interrupt  
T_I/O ID[15:0]  
IDE data bus  
T_O IA[2:0]  
IDE address bus  
100, 101  
T_O ICS#[1:0]  
T_O IDE_OE#[  
IDE chip select. Selects IDE drive 0 or 1  
IDE output enable. Only used when external buffering is  
required to drive IDE data bus  
63  
64  
T_O IRESET  
IDE interface reset  
89  
T_I  
DMARQ  
90  
91  
92  
95  
T_O DIOW#  
T_O DIOR#  
T_O IORDY  
T_O DMACK#  
IDE interface write strobe  
IDE interface read strobe  
96  
T_I  
INTRQ  
EEPROM interface  
128  
126  
1
O
O
IU  
O
GPO3  
GPO1  
GPI  
General Purpose Output 3  
General Purpose Output 1  
General Purpose Input  
127  
Miscellaneous Pins  
57  
GPO2  
General Purpose Output 2  
I
XTLI  
Crystal Oscillator input. 24.576 MHz crystal required. If a  
clock module is used rather than a crystal then this input  
must be tied high for the OXFW900 to operate, and the clock  
module output connected to the CKIN pin. IMPORTANT -  
See Application Notes regarding clocking  
58  
O
XTLO  
Crystal Oscillator output. IMPORTANT – See Application  
Notes regarding clocking.  
Data Sheet Revision 1.0  
Page 5  

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