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OXMPCI952-VBAG

更新时间: 2024-01-10 01:06:27
品牌 Logo 应用领域
OXFORD PC
页数 文件大小 规格书
108页 657K
描述
Integrated High Performance Dual UARTs, 8-bit Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.

OXMPCI952-VBAG 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:unknown风险等级:5.84
Is Samacsys:NBase Number Matches:1

OXMPCI952-VBAG 数据手册

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OXmPCI952 DATA SHEET  
Integrated High Performance Dual UARTs,  
8-bit Local Bus/Parallel Port.  
3.3v PCI/miniPCI interface.  
FEATURES  
Dual 16C950 High performance UART channels  
Arbitrary trigger levels for receiver and transmitter FIFO  
interrupts and automatic in-band and out-of-band flow  
control  
8-bit Pass-through Local Bus (PCI Bridge)  
IEEE1284 Compliant SPP/EPP/ECP parallel port (with  
external transceiver)  
Infra-red (IrDA) receiver and transmitter operation  
9-bit data framing, as well as 5,6,7 and 8 bits  
Detection of bad data in the receiver FIFO  
Global Interrupt Status and readable FIFO levels to facilitate  
implementation of efficient device drivers.  
Local registers to provide status/control of device functions.  
11 multi-purpose I/O pins, which can be configured as input  
interrupt pins or ‘wake-up’.  
Auto-detection of a wide range of MicrowireTM compatible  
EEPROMs, to configure device parameters.  
Function access, to pre-configure each function prior to  
handover to generic device drivers.  
Efficient 32-bit, 33MHz, Multi-function target-only PCI  
controller, fully compliant to PCI Local Bus specification 3.0,  
and PCI Power Management Specification 1.1  
PCI and miniPCI Modes (with CLKRUN# and PME#  
generation in the D3cold state, in miniPCI mode)  
UARTs fully software compatible with 16C550-type devices.  
UART operation up to 60 MHz via external clock source. Up  
to 20MHz with the crystal oscillator.  
Baud rates up to 60Mbps in external 1x clock mode and  
15Mbps in asynchronous mode.  
128-byte deep FIFO per transmitter and receiver  
Flexible clock prescaler, from 1 to 31.875  
Operation via IO or memory mapping.  
Automated in-band flow control using programmable  
Xon/Xoff in both directions  
Automated out-of-band flow control using CTS#/RTS#  
and/or DSR#/DTR#  
3.3V operation (5v tolerance on selected I/Os)  
Extended Operating Temp. Range : -40C to 105C  
160-pin LQFP/176-pin BGA package  
DESCRIPTION  
The OXmPCI952 is a single chip solution for PCI and mini-  
PCI based serial and parallel expansion add-in cards. It is  
a dual function PCI device, where function 0 offers two  
ultra-high performance OX16C950 UARTs, and function 1  
is configurable either as an 8-bit Local Bus or a bi-  
directional parallel port.  
registers visible to logical functions in I/O space and  
memory space.  
Expansion of serial cards beyond two channels is possible  
using the 8-bit pass-through Local Bus function. The  
addressable space can be increased up to 256 bytes, and  
divided into four chip-select regions. This flexible  
expansion scheme caters for cards with up to 18 serial  
ports using external 16C950, 16C952, 16C954 or  
compatible devices, or composite applications such as  
combined serial and parallel port expansion cards.  
Each UART channel in the OXmPCI952 is the fastest  
available PC-compatible UART, offering data rates up to  
15Mbps and 128-byte deep transmitter and receiver FIFOs.  
The deep FIFOs reduce CPU overhead and allow  
utilisation of higher data rates. Each UART channel is  
software compatible with the widely used industry-standard  
16C550 devices (and compatibles), as well as the  
OX16C95x family of high performance UARTs. In addition  
to increased performance and FIFO size, the UARTs also  
provide the full set of OX16C95x enhanced features  
including automated in-band flow control, readable FIFO  
levels etc.  
The parallel port is an IEEE 1284 compliant SPP/EPP/  
ECP parallel port that fully supports the existing Centronics  
interface. The parallel port can be enabled in place of the  
Local Bus. An external bus transceiver is required for 5V  
parallel port operation.  
The configuration register values are programmed using an  
external MicrowireTM compatible serial EEPROM. This  
EEPROM can also be used to provide function access, to  
pre-configure each UART into enhanced modes or pre-  
configure devices on the local bus/parallel port, prior to any  
PCI configuration accesses and before control is handed to  
(generic) device drivers.  
To enhance device driver efficiency and reduce interrupt  
latency, internal UARTs have multi-port features such as  
shadowed FIFO fill levels, a global interrupt source register  
and Good-Data Status, readable in four adjacent DWORD  
Oxford Semiconductor Ltd.  
25 Milton Park, Abingdon, Oxon, OX14 4SH, UK  
Tel: +44 (0)1235 824900  
External—Free Release  
© Oxford Semiconductor 2005  
OXmPCI952 DataSheet DS-0020 – June 2005  
Fax: +44(0)1235 821141  

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