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OXCB950-TQC60-A PDF预览

OXCB950-TQC60-A

更新时间: 2024-01-28 16:06:12
品牌 Logo 应用领域
OXFORD PC
页数 文件大小 规格书
67页 598K
描述
Integrated High Performance UART Cardbus / 3.3v PCI interface

OXCB950-TQC60-A 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:unknown风险等级:5.84
Base Number Matches:1

OXCB950-TQC60-A 数据手册

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OXCB950  
OXFORD SEMICONDUCTOR LTD.  
1 PERFORMANCE COMPARISON  
Feature  
16C550 +  
16C650 +  
OXCB950  
PCI Bridge  
PCI Bridge  
Support for PCI Power Management  
yes  
yes  
2
no  
no  
2
No  
No  
2
Zero wait-state read/write operation  
No. of external interrupt source pins  
DWORD access to UART Interrupt Source  
Registers & FIFO Levels  
Good-Data status  
yes  
no  
No  
yes  
yes  
no  
yes  
no  
No  
Yes  
No  
Full Plug and Play with external EEPROM  
External 1x baud rate clock  
Max baud rate in normal mode  
Max baud rate in 1x clock mode  
FIFO depth  
yes  
15 Mbps  
60 Mbps  
128  
yes  
115 Kbps  
n/a  
16  
1.5 Mbps  
n/a  
64  
Sleep mode  
no  
Yes  
Yes  
Yes  
No  
Auto Xon/Xoff flow  
yes  
no  
Auto CTS#/RTS# flow  
yes  
no  
Auto DSR#/DTR# flow  
No. of Rx interrupt thresholds  
No. of Tx interrupt thresholds  
No. of flow control thresholds  
Transmitter empty interrupt  
Readable status of flow control  
Readable FIFO levels  
yes  
no  
128  
128  
128  
yes  
4
4
1
4
n/a  
no  
4
No  
yes  
no  
No  
yes  
no  
No  
Clock prescaler options  
Rx/Tx disable  
248  
yes  
n/a  
no  
2
No  
Software reset  
yes  
no  
No  
Device ID  
yes  
no  
No  
9-bit data frames  
yes  
no  
No  
RS485 buffer enable  
yes  
no  
No  
Infra-red (IrDA)  
yes  
no  
Yes  
Table 1: OXCB950 performance compared with PCI Bridge + generic UART combinations in PCI mode  
1.1 Improvements of the OXCB950 over discrete solutions:  
Improved access timing:  
Access to the internal UART requires zero or one PCI wait states. A cardbus/PCI read transaction from the internal UART can  
complete within five PCI clock cycles and a write transaction to the internal UART can complete within four PCI clock cycles.  
Reduces interrupt latency:  
The OXCB950 offers shadowed FIFO levels and Interrupt status registers of the internal UART, as well as general device  
interrupt status, to reduce the device driver interrupt latency.  
Power management:  
The OXCB950 complies with the Cardbus Power Management Specification, given by the PC CARD standard release 7.0/7.1,  
the PCI Power Management Specification 1.0 and the PC98/99 Power Management specifications, by offering the extended  
DS-0033 Sep 05  
External-Free Release  
Page 5  

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