OXCF950 rev B
DATA SHEET V1.0
EATURES
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Single full-duplex asynchronous channel
128-byte deep transmitter / receiver FIFO
Fully software compatible with industry standard
16C550 type UARTs
Readable FIFO levels
System clock up to 60MHz
Flexible clock prescaler from 1 to 31.875
9-bitdata framing as well as 5,6,7 and 8
Detection of bad data in the receiver FIFO
Automated in-band flow control using programmable
Xon/Xoff characters
Transmitter and receiver can be disabled
Low power CMOS
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Programmable by external MicrowireTM EEPROM
(EEPROM programmed via Oxford Semiconductor
utilities).
Extremely low power consumption by use of
asynchronous UART core and power down (sleep)
modes
Range of packages -Ultra small 48 pin TQFP package
or a 48 ball TFBGA.
Supports all UART types 450 up to 950 (fully
programmable)
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CF+ Compliant (Revision 1.4).
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16-bit PC Card Compliant (PCMCIA Revision 7.1)
8 bit Local Bus interface included for PCMCIA
applications
2 Multi-purpose I/O pins which can be configured as
interrupt inputs
3.3V operation, 5V tolerant I/O
Extended temperature range –40C to +105C
Software compatible with OXCF950
16C950 mode for local bus applications
Generic embedded driver compatibility mode
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ESCRIPTION
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The OXCF950 rev B is a low cost asynchronous 16-bit PC
The OXCF950 rev B contains a single-channel ultra-high
card (henceforth referred to as PCMCIA) or Compact Flash
(henceforth referred to as CF) UART (and Local Bus)
device. Local Bus Selection is performed by use of a
MODE pin. Note that Local Bus mode uses indirect
addressing, which is only supported by PCMCIA.
performance UART offering data rates up to 15Mbps and
128-deep transmitter and receiver FIFOs. Deep FIFOs
reduce CPU overhead and allow utilisation of higher data
rates.
It is software compatible with the widely used industry-
The 3.3V technology has been specified to operate as low
as 2.7 V to allow an in-line regulator to be used for mixed
3V/5V applications. All the I/Os are 5V tolerant with the
exception of the clock/crystal oscillator input.
standard 16C550 ty pe devices and compatibles, as well as
other OX16C95x family devices.
In addition to increased performance and FIFO size, the
OXCF950 rev B also provides enhanced features including
improved flow control. Automated software flow control
using Xon/Xoff and automated hardware flow control using
The EEPROM interface allows the programming of the
Attribute Memory, UART and Local Configuration Registers
during power up or hard/soft reset. This allows different
card manufacturers to modify the information contained in
the Attribute memory or UART/registers as required, for
example PC-Card ID value.
CTS#/RTS# and DSR#/DTR# prevent FIFO over-run. Flow
control and interrupt thresholds are fully programmable and
readable, enabling programmers to fine-tune the
performance of their system. FIFO levels are readable to
facilitate fast driver applications.
A number of power -down modes are included to keep
power consumption to a minimum. Such features include
clock division (fully programmable) and sleep modes when
a function of the OXCF950 rev B is not being used.
The addition of software reset enables recovery from
unforeseen error conditions allowing drivers to restart
gracefully. The OXCF950 rev B supports 9-bit data frames
used in multi-drop industrial protocols. It also offers multiple
Oxford Semiconductor Ltd.
25 Milton Park, Abingdon, Oxon, OX14 4SH, UK
Tel: +44 (0)1235 824900
Ó Oxford Semiconductor 2001 .
OXCF950B DATA SHEET REV 1.0 –July 2002
Part No. OXCF950-TQ-B
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