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ONET4201LDRGET

更新时间： 2024-01-13 22:22:59

品牌	Logo	应用领域
德州仪器 - TI		驱动器驱动程序和接口接口集成电路
页数	文件大小	规格书
26页	1191K
描述
155-Mbps to 4.25-Gbps LASER DRIVER

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数据手册

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ONET4201LDRGET 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFN
包装说明：	QFN-16	针数：	16
Reach Compliance Code：	compliant	ECCN代码：	5A991.B.1
HTS代码：	8542.33.00.01	Factory Lead Time：	26 weeks
风险等级：	0.71	Is Samacsys：	N
应用程序：	SONET;SDH	JESD-30 代码：	S-PQCC-N16
JESD-609代码：	e4	长度：	3 mm
湿度敏感等级：	2	功能数量：	1
端子数量：	16	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	HVQCCN	封装等效代码：	LCC16,.12SQ,20
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	电源：	3.3 V
认证状态：	Not Qualified	座面最大高度：	1 mm
子类别：	ATM/SONET/SDH ICs	最大压摆率：	45 mA
标称供电电压：	3.3 V	表面贴装：	YES
电信集成电路类型：	ATM/SONET/SDH SUPPORT CIRCUIT	温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	3 mm
Base Number Matches：	1

ONET4201LDRGET 数据手册

ONET4201LD

www.ti.com

SLLS677–NOVEMBER 2005

DETAILED DESCRIPTION (continued)

The MONP is also provided as a photocurrent monitor output. The photodiode current, I_PD, is mirrored and

develops a voltage across an external resistor to ground, R_MONP. The voltage at MONP is given as:

[V]

[W]

[A]

MONP

(5)

If the voltage at MONP is greater than the programmed threshold, a fault mode occurs.

As with any negative-feedback system design, care must be taken to assure stability of the loop. The loop

bandwidth must not be too high in order to minimize pattern-dependent jitter. The dominant pole is determined by

the capacitor C_APC. The recommended value for C_APCis 200 nF. The capacitance of the monitor photodiode C_PD

adds another pole to the system, and thus it must be small enough to maintain stability. The recommended value

for this capacitance is C_PD≤ 50 pF.

The internal APC loop can be disabled by connecting a 100-kΩ resistor from APCSET to VCC and leaving PD

open. In open-loop operation, the laser diode current is set by I_BIASMAXand I_MODSET

MODULATION-CURRENT GENERATOR

The modulation-current generator defines the tail current of the modulator, which is sunk from either MOD+ or

MOD–, depending on the data pattern. The modulation current consists of a modulation current I_MOD0at a

reference temperature T₀= 60°C (set by the resistor R_MODSET) and a temperature-dependent modulation current

defined by the resistor R_MODTC. The modulation current can be estimated as follows:

265 V

24 W

ǒ_{T[ C] * T [ C]}

[A] +

MOD

1 )

) 630 ppm

[W]

MODSET

MODTC

(6)

Note that the reference temperature, T₀, and the temperature compensation set by R_MODTCvary from part to part.

To reduce the variation, I_MODcan be calibrated over temperature and set with a microcontroller DAC or digital

potentiometer.

CONTROL

The functions of this block are to control the start-up sequence, detect faults, detect tracking failure of the APC

loop, and provide disable control. The laser driver has a controlled start-up sequence, which helps prevent

transient glitches from being applied to the laser during power on. At start-up, the laser diode is off, SDOWN is

low, and the APC loop is open. Once V_CCreaches ~2.8 V, the laser diode bias generator and modulation current

generator circuitry are activated (if DISABLE is low). The slow-start circuitry gradually brings up the current

delivered to the laser diode. From the time that V_CCreaches ~2.8 V until the modulation current and bias current

reach 95% of their steady state value, is considered the initialization time. If DISABLE is asserted during power

on, the slow-start circuitry does not activate until DISABLE is negated.

FAULT DETECTION

The fault-detection circuitry monitors the operation of the ONET4201LD. If FLTMODE is set to a low level,

(hard-fault mode) this circuitry disables the bias and modulation circuits and latches the SDOWN output on

detection of a fault. The fault mode is reset by toggling DISABLE (for a minimum time of T_RES) or by toggling V_CC

Once DISABLE is toggled, SDOWN is set low and the circuit is re-initialized.

If FLTMODE is set to a high level (soft-fault mode), a fault is indicated at the SDOWN output; however, the bias

and modulation circuits are not disabled. The SDOWN output is reset once the fault causing condition

disappears. Toggling DISABLE or VCC is not required.

A functional representation of the fault detection circuitry is shown in Figure 2.

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