NW6005
ENHANCED TYPE II CALLER ID DECODER
FEATURES
DESCRIPTION
·
1200 baud Bell 202 and ITU-T V.23 Frequency Shift Keying
(FSK) Demodulation
The NW6005 device is a single-chip, 3/5 Volt CMOS caller ID with
call waiting detection circuit. It can receive signals following Bellcore
GR-30-CORE & SR-TSV-002476, BT SIN227 & SIN242, and ETSI
ETS 300 788-1/-2 specifications.
·
Compliant with following specifications:
Bellcore GR-30-CORE & SR-TSV-002476
TIA/EIA-716, TIA/EIA-777 Draft
British Telecom (BT) SIN227 & SIN242
ETSI ETS 300 778-1 and -2
The NW6005 provides 1200 baud Bell 202 and ITU-T V.23 FSK
demodulation and CAS/DT-AS detection. Two seperate differential
·
·
Bellcore “CPE Alerting Signal (CAS)”, British Telecom “Idle State input amplifiers allow the device to be connected with both Tip/Ring
and Loop State Tone Alert Signal” and ETSI “Dual Tone Alerting and Telephone Hybrid receive pair. FSK demodulation is
Signal (DT-AS)” detection
Two seperate OP amps with adjustable gain for Tip/Ring and
Telephone Hybrid connections
Monitoring of the stop bit for framing error check
Serial FSK data interface with selectable output of bit stream or 1
byte buffer
implemented only on Tip/Ring, while DT-AS (or CAS) detection can be
on either Tip/Ring or Hybrid Receive. In addition, NW6005 provides a
serial FSK data interface via which the data can be selected to be
processed as a bit stream or extracted from a 1 byte built-in buffer.
·
·
The device can be used in feature or cordless phones for BT
Calling Line Identity Presentation (CLIP), CCA CLIP and Bellcore
Calling Identity Delivery (CID) systems. It can also be used in caller ID
boxes, modem, fax machines, answering machines, database query
systems and Computer Telephony Integration (CTI) systems.
·
·
·
·
·
FSK carrier detection
3 V or 5 V operation
Low power CMOS with intelligent powerdown mode
Operating temperature range: -40 °C to +85 °C
Packages available:
NW6005-XS 20 pin SOIC
(where ‘X’ is the revision ID)
FUNCTIONAL BLOCK DIAGRAM
OSCOUT OSCIN
CB0 CB1 CB2
Control Bit
Decoder
Bias
Generator
Oscillator
VREF
FSKEN
CASEN MODE
PWDN
GS1EN
PWDN
GS2EN
CASEN
ST/GT
GS1EN
Guard Time
IN1+
DR/STD
+
Dual Tone
Detector
-
EST
IN1-
GS1
CD
+
-
DCLK
DATA
IN2+
FSK
Demodulator
Data/Timing Recovery
IN2-
GS2
GS2EN
MODE
FSKEN
Figure 1. Block Diagram
The IDT logo is a registered trademark of Integrated Device Technology, Inc
INDUSTRIAL TEMPERATURE RANGE
JULY 2002
ã 2002 Integrated Device Technology, Inc.
DSC-6048/3