NV34C04
EEPROM Serial 4-Kb SPD
Automotive Grade 1 for
DDR4 DIMM
Description
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The NV34C04 is a EEPROM Serial 4−Kb, which implements the
JEDEC JC42.4 (EE1004−v) Serial Presence Detect (SPD)
specification for DDR4 DIMMs and supports the Standard (100 kHz),
2
1
1
Fast (400 kHz) and Fast Plus (1 MHz) I C protocols.
UDFN8
UDFN8
One of the two available 2−Kb EEPROM banks (referred to as SPD
pages in the EE1004−v specification) is activated for access at
power−up. After power−up, banks can be switched via software
command. Each of the four 1−Kb EEPROM blocks can be Write
Protected by software command.
MU3 SUFFIX
CASE 517AZ
MUW3 SUFFIX
CASE 517DH
PIN CONFIGURATION
1
V
A
A
A
CC
0
1
2
Features
WP
• JEDEC JC42.4 (EE1004−v) Serial Presence Detect (SPD) Compliant
• Automotive Grade 1 Temperature Range: −40°C to +125°C
• Supply Range: 1.7 V − 3.6 V
(Top View)
SCL
SDA
V
SS
UDFN (MU3, MUW3)
2
• I C / SMBus Interface
For the location of Pin 1, please consult the
corresponding package drawing.
• Schmitt Triggers and Noise Suppression Filters on SCL and SDA
Inputs
• 16−Byte Page Write Buffer
MARKING DIAGRAM
• Hardware Write Protection for Entire Memory
• Low Power CMOS Technology
XXX
AZZ
• 2 x 3 x 0.5 mm UDFN Package
UDFN8
YM
• These Devices are Pb−Free and are RoHS Compliant
G
V
CC
XXX
A
ZZ
Y
M
G
= Specific Device Code
= Assembly Location Code
= Assembly Lot Number (Last Two Digits)
= Production Year (Last Digit)
= Production Month (1 − 9, O, N, D)
= Pb−Free Package
SCL
NV34C04
SDA
A , A , A
2
1
0
PIN FUNCTIONS
WP
Pin Name
Function
Device Address Input
Serial Data Input/Output
Serial Clock Input
Write Protect Input
Power Supply
A , A , A
0
1
2
V
SS
SDA
Figure 1. Functional Symbol
SCL
WP
V
CC
V
SS
Ground
DAP
Backside Exposed DAP at V
SS
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
September, 2018 − Rev. 0
NV34C04/D