NV25512WF
EEPROM Serial 512-Kb SPI
Automotive Grade 1
inꢀWettable Flank UDFN-8
Package
www.onsemi.com
Description
The NV25512 is a EEPROM Serial 512−Kb SPI Automotive
Grade 1 device internally organized as 64Kx8 bits. This features a
128−byte page write buffer and supports the Serial Peripheral
Interface (SPI) protocol. The device is enabled through a Chip Select
(CS) input. In addition, the required bus signals are clock input (SCK),
data input (SI) and data output (SO) lines. The HOLD input may be
used to pause any serial communication with the NV25512 device.
The device features software and hardware write protection, including
partial as well as full array protection.
1
UDFN8
(Wettable Flank)
MUW3 SUFFIX
CASE 517DH
On−Chip ECC (Error Correction Code) makes the device suitable
for high reliability applications.
PIN CONFIGURATION
Features
V
CS
SO
1
CC
HOLD
SCK
SI
• Automotive Temperature Grade 1 (−40°C to +125°C)
• 10 MHz SPI Compatible
• 1.8 V to 5.5 V Supply Voltage Range
• SPI Modes (0,0) & (1,1)
• 128−byte Page Write Buffer
WP
V
SS
UDFN8 (MUW3)
(Top View)
• Additional Identification Page with Permanent Write Protection
• Self−timed Write Cycle
PIN FUNCTION
Pin Name
Function
Chip Select
• Hardware and Software Protection
• Block Write Protection
CS
SO
WP
1
1
− Protect / , / or Entire EEPROM Array
Serial Data Output
Write Protect
4
2
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
V
SS
Ground
SI
Serial Data Input
Serial Clock
• Wettable Flank UDFN 8−pad Package
SCK
• This Device is Pb−Free, Halogen Free/BFR Free, and RoHS
HOLD
Hold Transmission Input
Power Supply
Compliant
V
CC
V
CC
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
SI
CS
NV25512
SO
WP
HOLD
SCK
V
SS
Figure 1. Functional Symbol
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
June, 2018 − Rev. 2
NV25512WF/D