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NS32FX164V-25 PDF预览

NS32FX164V-25

更新时间： 2024-11-06 22:11:47
品牌 Logo 应用领域
美国国家半导体 - NSC 外围集成电路时钟
页数 文件大小 规格书
102页 1048K
描述
Advanced Imaging/Communication Signal Processors

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NS32FX164V-25 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：QCCJ, LDCC68,1.0SQReach Compliance Code：unknown
ECCN代码：3A001.A.3HTS代码：8542.31.00.01
风险等级：5.85地址总线宽度：24
桶式移位器：NO边界扫描：NO
最大时钟频率：50 MHz外部数据总线宽度：16
格式：FIXED POINT内部总线架构：SINGLE
JESD-30 代码：S-PQCC-J68JESD-609代码：e0
长度：24.13 mm低功率模式：YES
端子数量：68最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：QCCJ封装等效代码：LDCC68,1.0SQ
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
认证状态：Not Qualified座面最大高度：4.57 mm
子类别：Serial IO/Communication Controllers最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：J BEND端子节距：1.27 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：24.13 mmuPs/uCs/外围集成电路类型：DIGITAL SIGNAL PROCESSOR, MIXED
Base Number Matches：1

NS32FX164V-25 数据手册

 浏览型号NS32FX164V-25的Datasheet PDF文件第2页浏览型号NS32FX164V-25的Datasheet PDF文件第3页浏览型号NS32FX164V-25的Datasheet PDF文件第4页浏览型号NS32FX164V-25的Datasheet PDF文件第5页浏览型号NS32FX164V-25的Datasheet PDF文件第6页浏览型号NS32FX164V-25的Datasheet PDF文件第7页 
February 1992  
NS32FX161-15/NS32FX161-20/NS32FX164-20/  
NS32FX164-25/NS32FV16-20/NS32FV16-25  
Advanced Imaging/Communication Signal Processors  
General Description  
The NS32FX164, the NS32FV16 and the NS32FX161 are  
The NS32FX164 capabilities can be expanded by using an  
external floating point unit (FPU) which directly interfaces to  
the NS32FX164 using the slave protocol. The CPU-FPU  
cluster features high speed execution of the floating-point  
instructions.  
high-performance 32-bit members of the Series 32000  
/
É
EPTM family of National’s Embedded System ProcessorsTM  
specifically optimized for CCITT Group 2 and Group 3 Fac-  
simile Applications, Data Modems, Voice Mail Systems, La-  
ser Printers, or any combination of the above.  
The NS32FX164 highly-efficient architecture combined with  
the NS32CG16 graphics instructions and the high-perform-  
ance vector operation capability, makes the device the ideal  
choice for PostscriptTM and Fax applications.  
Unless specified otherwise any reference to the  
NS32FX164 in this document applies to the NS32FV16 and  
the NS32FX161 as well.  
The NS32FX164 can perform all the computations and con-  
trol functions required for a stand-alone Fax system, a PC  
add-in Fax/Voice/Data Modem card or a Laser/Fax sys-  
tem.  
Features  
Y
Software compatible with the Series 32000/EP  
processors  
Y
Designed around the CPU core of the NS32CG16  
It also meets the performance requirements to implement  
14400, 9600 and 7200 bps modems complying with CCITT  
V.17, V.29 and V.27 standards. The NS32FV16 supports  
V.29 and V.27 standards as well as voice. The NS32FX161  
supports V.29 and V.27 standards.  
Y
Pin compatible with the NS32FX16  
Y
32-bit architecture and implementation  
Y
On-chip DSP Module for high-speed DSP operations  
Y
Special support for graphics applications  
Ð 18 graphics instructions  
Ð Binary compression/expansion capability for font  
storage using RLL encoding  
Ð Pattern magnification  
The NS32FX164 provides a 16 Mbyte Linear external ad-  
dress space and a 16-bit external data bus.  
The CPU core, which is the same as that of the NS32CG16,  
incorporates a 32-bit ALU and instruction pipeline, and an  
8-byte prefetch queue.  
Ð Interface to an external BITBLT processing units for  
fast color BITBLT operations  
Also integrated on-chip with the CPU are a DSP Module  
(DSPM) and a 4K-byte RAM Array (2K in the NS32FV16 and  
NS32FX161). The DSPM is a complete processing unit, ca-  
pable of autonomous operation parallel to the CPU core  
operation. The DSPM executes programs stored in an inter-  
nal on-chip Random Access Memory (RAM), and manipu-  
lates data stored either in the internal RAM or in an external  
off-chip memory. To maximize utilization of hardware re-  
sources, the DSPM contains a pipelined DSP-oriented data-  
path, and a control logic that implements a set of DSP vec-  
tor commands.  
Y
4K-byte on-chip RAM array (2K in NS32FV16 and  
NS32FX161)  
Y
On-chip clock generator  
Y
Floating-point support via the NS32081 or NS32181  
Y
Optimal interface to large memory arrays via the  
NS32CG821 and the DP84xx family of DRAM  
controllers  
Y
Power save mode  
Y
High-speed CMOS technology  
Y
68-pin PLCC package  
Block Diagram  
TL/EE/11267–1  
FIGURE 1-1. CPU Block Diagram  
Series 32000É is a registered trademark of National Semiconductor Corporation.  
EPTM and Embedded System ProcessorsTM are trademarks of National Semiconductor Corporation.  
PostscriptTM is a trademark of Adobe Systems, Inc.  
C
1995 National Semiconductor Corporation  
TL/EE11267  
RRD-B30M115/Printed in U. S. A.  
1234567...102

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