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NM27C240V150 PDF预览

NM27C240V150

更新时间: 2024-11-16 19:51:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD OTP只读存储器内存集成电路
页数 文件大小 规格书
10页 96K
描述
OTP ROM, 256KX16, 150ns, CMOS, PQCC44, PLASTIC, LCC-44

NM27C240V150 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:LCC包装说明:QCCJ, LDCC44,.7SQ
针数:44Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.77Is Samacsys:N
最长访问时间:150 nsI/O 类型:COMMON
JESD-30 代码:S-PQCC-J44JESD-609代码:e0
长度:16.51 mm内存密度:4194304 bit
内存集成电路类型:OTP ROM内存宽度:16
功能数量:1端子数量:44
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC44,.7SQ
封装形状:SQUARE封装形式:CHIP CARRIER
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
座面最大高度:4.57 mm最大待机电流:0.0001 A
子类别:OTP ROMs最大压摆率:0.04 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:16.51 mm
Base Number Matches:1

NM27C240V150 数据手册

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July 1998  
NM27C240  
4,194,304-Bit (256k x 16) High Performance  
CMOS EPROM  
General Description  
Features  
The NM27C240 is a high performance Electrically Programmable  
UV erasable ROM (EPROM). It contains 4,194,304 bits config-  
ured as 256k x 16 bits. It is offered in both erasable versions for  
prototyping and early production applications as well as non-  
erasable, plastic packaged versions that are ideal for high volume  
and automated assembly applications.  
High performance CMOS  
100 ns access time  
Fast turn-off for microprocessor compatibility  
Simplified upgrade path  
VPP and PGM are “Don’t Care” during normal read  
operation  
The NM27C240 operates from a single 5V ±10% supply in the  
read mode.  
Compatible with 27240 and 27C240 EPROMs  
JEDEC standard pin configuration  
40-pin DIP package  
44-pin PLCC package  
The NM27C240 is offered in both DIP and surface mount pack-  
ages. The DIP package is a 40-pin dual-in-line ceramic with a  
quartz window to allow erasing. The surface mount package is a  
44-pin PLCC that is offered in OTP.  
Manufacturer’s identification code  
Fast programming algorithm  
ThisEPROMismanufacturedusingFairchild’sproprietaryAMG™  
EPROM technology for an excellent combination of speed and  
economy while providing excellent reliability.  
Block Diagram  
Data Outputs O - O  
V
0
15  
cc  
GND  
V
pp  
Output Enable  
OE  
Chip Enable, and  
Output  
Buffers  
Program Logic  
CE/PGM  
Y
Decoder  
4,194,304-Bit  
Cell Matrix  
A
- A  
0
17  
Address  
Inputs  
X
Decoder  
DS011949-1  
AMG™ is a trademark of WSI, Inc.  
1
© 1998 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  

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