NL17SZ74
Single D Flip Flop
The NL17SZ74 is a high performance, full function Edge triggered
D Flip Flop, with all the features of a standard logic device such as the
74LCX74.
• Extremely High Speed: t 2.6 ns (typical) at V = 5 V
PD
CC
http://onsemi.com
• Designed for 1.65 V to 5.5 V V Operation
CC
• 5 V Tolerant Inputs – Interface Capability with 5 V TTL Logic
• LVTTL Compatible
PR
• LVCMOS Compatible
7
• 24 mA Balanced Output Sink and Source Capability
D
2
Q
Q
5
3
• Near Zero Static Supply Current (10 µA) Substantially Reduces
System Power Requirements
1
CP
• Replacement for NC7SZ74
6
• Tiny Ultra Small Package Only 2.1 X 3.0 mm
V
= 8, GND = 4
CC
CLR
• High ESD Ratings: 2000 V Human Body Model
High ESD Ratings: 200 V Machine Model
Figure 1. Logic Diagram
• Chip Complexity: FET = 64
TRUTH TABLE
Inputs
Outputs
PR CLR CP
D
Q
Q
Operating Mode
US8
CASE 493
US SUFFIX
L
H
L
H
L
L
X
X
X
X
X
X
H
L
H
L
H
H
Asynchronous Set
Asynchronous Clear
Undetermined
H
H
H
H
↑
↑
h
l
H
L
L
H
MARKING DIAGRAM
Load and Read Register
Hold
H
H
↑
X
NC
NC
H
h
L
l
= High Voltage Level
= High Voltage Level One Setup Time Prior to the Low–to–High Clock Transition
= Low Voltage Level
D
MH
= Low Voltage Level One Setup Time Prior to the Low–to–High Clock Transition
NC = No Change
X
↑
↑
= High or Low Voltage Level and Transitions are Acceptable
= Low–to–High Transition
= Not a Low–to–High Transition
MH = Specific Device Code
D
= Date Code
For I reasons, DO NOT FLOAT Inputs
CC
PINOUT
1
8
7
6
5
CP
D
Q
V
CC
2
3
4
PR
CLR
Q
GND
ORDERING INFORMATION
Device
Package
Shipping
NL17SZ74US
US8
3000/Tape & Reel
Semiconductor Components Industries, LLC, 2002
1
Publication Order Number:
May, 2002 – Rev. 2
NL17SZ74/D