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NCP51401MNTXG PDF预览

NCP51401MNTXG

更新时间: 2024-01-30 14:21:05
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管接口集成电路
页数 文件大小 规格书
7页 336K
描述
Termination Regulator

NCP51401MNTXG 技术参数

是否无铅: 不含铅生命周期:Active
包装说明:DFN-10Reach Compliance Code:compliant
Factory Lead Time:20 weeks风险等级:5.73
差分输出:NO接口集成电路类型:BUS TERMINATOR SUPPORT CIRCUIT
JESD-30 代码:S-PDSO-N10JESD-609代码:e3
长度:3 mm湿度敏感等级:1
功能数量:1端子数量:10
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装等效代码:SOLCC10,.12,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE标称上拉电阻:100000 Ω
座面最大高度:1 mm最大压摆率:1 mA
最大供电电压:5.5 V最小供电电压:2.375 V
标称供电电压:3.3 V表面贴装:YES
温度等级:AUTOMOTIVE端子面层:Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUAL宽度:3 mm
Base Number Matches:1

NCP51401MNTXG 数据手册

 浏览型号NCP51401MNTXG的Datasheet PDF文件第2页浏览型号NCP51401MNTXG的Datasheet PDF文件第3页浏览型号NCP51401MNTXG的Datasheet PDF文件第4页浏览型号NCP51401MNTXG的Datasheet PDF文件第5页浏览型号NCP51401MNTXG的Datasheet PDF文件第6页浏览型号NCP51401MNTXG的Datasheet PDF文件第7页 
NCP51401  
3 Amp VTT Termination  
Regulator DDR1, DDR2,  
DDR3, LPDDR3, DDR4  
The NCP51401 is a source/sink Double Data Rate (DDR)  
termination regulator specifically designed for low input voltage and  
low−noise systems where space is a key consideration.  
www.onsemi.com  
The NCP51401 maintains a fast transient response and only requires  
a minimum output capacitance of 20 mF. The NCP51401 supports a  
remote sensing function and all power requirements for DDR V bus  
TT  
termination. The NCP51401 can also be used in low−power chipsets  
and graphics processor cores that require dynamically adjustable  
output voltages.  
DFN10, 3x3, 0.5P  
CASE 506CL  
The NCP51401 is available in the thermally−efficient DFN10  
Exposed Pad package, and is rated both Green and Pb−free.  
MARKING DIAGRAM  
Features  
51401  
ALYWG  
G
Input Voltage Rails: Supports 2.5 V, 3.3 V and 5 V Rails  
PV Voltage Range: 1.1 to 3.5 V  
CC  
Integrated Power MOSFETs  
51401 = Specific Device Code  
Source and Sink Termination Regulator with Droop Compensation  
Fast Load−Transient Response  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
P  
− Logic output pin to Monitor V Regulation  
GOOD  
TT  
EN − Logic input pin for Shutdown mode  
V − Reference Input Allows for Flexible Input Tracking Either  
RI  
(Note: Microdot may be in either location)  
Directly or Through Resistor Divider  
Remote Sensing (V  
)
TTS  
PIN CONNECTION  
Built−in Under Voltage Lockout and Over Current Limit  
Thermal Shutdown  
+
V
1
2
10  
9
V
P
RI  
CC  
Small, Low−Profile 10−pin, 3x3 DFN Package  
These Devices are Pb−Free and are RoHS Compliant  
PV  
CC  
GOOD  
V
TT  
GND  
GND  
EN  
3
4
5
8
7
6
Applications  
P
GND  
DDR Memory Termination  
V
V
RO  
TTS  
Desktop PC’s, Notebooks, and Workstations  
Servers and Networking equipment  
Telecom/Datacom, GSM Base Station  
Graphics Processor Core Supplies  
Set Top Boxes, LCD−TV/PDP−TV, Copier/Printers  
Chipset/RAM Supplies as Low as 0.5 V  
Active Bus Termination  
Exposed Pad  
ORDERING INFORMATION  
Device  
Package  
Shipping  
NCP51401MNTXG  
DFN10  
3000 / Tape &  
Reel  
(Pb−Free)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
© Semiconductor Components Industries, LLC, 2016  
1
Publication Order Number:  
May, 2016 − Rev. 0  
NCP51401/D  

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3 Amp VTT Termination Source / Sink Regulator for DDR, DDR-2, DDR-3, DDR-4