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NCP1230P100 PDF预览

NCP1230P100

更新时间： 2024-11-29 04:37:59
品牌 Logo 应用领域
安森美 - ONSEMI 控制器
页数 文件大小 规格书
21页 261K
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Low−Standby Power High Performance PWM Controller

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NCP1230P100 数据手册

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NCP1230  
Low−Standby Power High  
Performance PWM  
Controller  
The NCP1230 represents a major leap towards achieving low  
standby power in medium−to−high power Switched−Mode Power  
Supplies such as notebook adapters, off−line battery chargers and  
consumer electronics equipment. Housed in a compact 8−pin package  
(SOIC−8, SOIC−7, or PDIP−7), the NCP1230 contains all needed  
control functionality to build a rugged and efficient power supply. The  
NCP1230 is a current mode controller with internal ramp  
compensation. Among the unique features offered by the NCP1230 is  
an event management scheme that can disable the front−end PFC  
circuit during standby, thus reducing the no load power consumption.  
The NCP1230 itself goes into cycle skipping at light loads while  
limiting peak current (to 25% of nominal peak) so that no acoustic  
noise is generated. The NCP1230 has a high−voltage startup circuit  
that eliminates external components and reduces power consumption.  
The NCP1230 also features an internal latching function that can be  
used for OVP protection. This latch is triggered by pulling the CS pin  
http://onsemi.com  
MARKING  
DIAGRAM  
8
SOIC−8 VHVIC  
D SUFFIX  
CASE 751  
230Dy  
ALYWy  
G
8
1
1
8
1
SOIC−7  
D1 SUFFIX  
CASE 751U  
8
30D16  
ALYWG  
G
1
above 3.0 V and can only be reset by pulling V to ground. True  
CC  
overload protection, internal 2.5 ms soft−start, internal leading edge  
blanking, internal frequency dithering for low EMI are some of the  
other important features offered by the NCP1230.  
1230Pxxx  
AWL  
YYWWG  
PDIP−7 VHVIC  
P SUFFIX  
CASE 626B  
Features  
8
1
• Current−Mode Operation with Internal Ramp Compensation  
• Internal High−Voltage Startup Current Source for Loss−Less Startup  
• Extremely Low No−Load Standby Power  
• Skip−Cycle Capability at Low Peak Currents  
• Direct Connection to PFC Controller for Improved No−Load Standby  
Power  
1
xxx  
y
y
A
L
= Device Code: 65, 100, 133  
= Device Code: 6, 1, 1  
= Device Code: 5, 0, 3  
= Assembly Location  
= Wafer Lot  
Y, YY  
= Year  
• Internal 2.5 ms Soft−Start  
• Internal Leading Edge Blanking  
W, WW = Work Week  
G
= Pb−Free Package  
= Pb−Free Package  
G
• Latched Primary Overcurrent and Overvoltage Protection  
• Short−Circuit Protection Independent of Auxiliary Level  
• Internal Frequency Jittering for Improved EMI Signature  
• +500 mA/−800 mA Peak Current Drive Capability  
• Available in Three Frequency Options: 65 kHz, 100 kHz, and 133 kHz  
• Direct Optocoupler Connection  
(Note: Microdot may be in either location)  
PIN CONNECTIONS  
1
8
PFC Vcc  
FB  
HV  
• SPICE Models Available for TRANsient and AC Analysis  
• Pb−Free Packages are Available  
CS  
GND  
V
CC  
DRV  
Typical Applications  
• High Power AC−DC Adapters for Notebooks, etc.  
• Offline Battery Chargers  
• Set−Top Boxes Power Supplies, TV, Monitors, etc.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the ordering  
information section on page 4 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 − Rev. 8  
NCP1230/D  
1234567...21

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NCP1230P100 替代型号

型号 品牌 替代类型 描述 数据表
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