Datasheet > NCH48NC-FREQ1

NCH48NC-FREQ1

更新时间： 2024-11-14 08:55:03

品牌	Logo	应用领域
百利通 - PERICOM		机械振荡器
页数	文件大小	规格书
2页	74K
描述
CMOS Output Clock Oscillator, 24MHz Min, 40MHz Max,

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中文翻译

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数据手册

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NCH48NC-FREQ1 数据手册

SaRonix

Crystal Clock Oscillator

HCMOS

NTH / NCH Series

Technical Data

Frequency Range:

500 kHz to 100 MHz

20ꢀ, 25, 50 or 100 ꢁꢁꢂ over all conꢃitionsꢄ caliꢅration

Frequency Stability:

tolerance, oꢁerating teꢂꢁerature, inꢁut voltage change, loaꢃ

change, aging, shock anꢃ viꢅration.

ꢀSee Part Nuꢂꢅering Guiꢃe

Temperature Range:

Oꢁeratingꢄ

Storageꢄ

0 to +70°C or -40 to +85°C

-55 to +125°C

Supply Voltage:

Recoꢂꢂenꢃeꢃ Oꢁeratingꢄ

+5VDC 10%

SupplyCurrent:

0.5 to 8 MHzꢄ

8+ to 25 MHzꢄ

25+ to 50 MHzꢄ

12ꢂA

20ꢂA

35ꢂA

50ꢂA

ACTUAL SIZE

Description

50+ to 100 MHzꢄ

A crystal controlleꢃ, low current oscil-

lator ꢁroviꢃing ꢁrecise rise anꢃ fall

tiꢂes to ꢃrive High Sꢁeeꢃ HCMOS

anꢃ NMOS ꢂicroꢁrocessors. The tri-

state function on the NTH enaꢅles the

outꢁut to go high iꢂꢁeꢃance. Can ꢃrive

ꢅoth High Sꢁeeꢃ CMOS anꢃ TTL.

Device is ꢁackageꢃ in a 14 or an 8-ꢁin

DIP coꢂꢁatiꢅle resistance welꢃeꢃ, all

ꢂetal grounꢃeꢃ case, to reꢃuce EMI.

Output Drive:

HCMOS

Syꢂꢂetryꢄ

See Part Nuꢂꢅering Guiꢃe

8ns ꢂax to 25 MHz, 20% to 80% V

5ns ꢂax 25+ to 100 MHz

Rise anꢃ Fall Tiꢂesꢄ

Logic 0ꢄ

Logic 1ꢄ

Loaꢃꢄ

10% V ꢂax

90% V ꢂin

50ꢁF to 50MHz, 30ꢁF 50+ to 70 MHz, 15 ꢁF 70+ to 100 MHz

8ꢁs ꢂax RMS ꢁerioꢃ jitter, 1ꢁs ꢂax 1σ cycle-to-cycle jitter

Jitterꢄ

TTL

Syꢂꢂetryꢄ

See Part Nuꢂꢅering Guiꢃe

6ns ꢂax to 25 MHz, 0.5 to 2.5V

5ns ꢂax 25+ to 100 MHz

0.5V ꢂax

Rise anꢃ Fall Tiꢂesꢄ

Applications & Features

Logic 0ꢄ

Logic 1ꢄ

Loaꢃꢄ

-0.6V ꢂin

• Clock 16 anꢃ 32 ꢅit ꢂicroꢁrocessors

• Tri-State outꢁut on NTH

• HCMOS coꢂꢁatiꢅle

10 TTL to 50 MHz, 5 TTL 50+ to 100 MHz

8ꢁs ꢂax RMS ꢁerioꢃ jitter, 1ꢁs ꢂax 1σ cycle-to-cycle jitter

Jitterꢄ

• Grounꢃeꢃ, all ꢂetal full size or half size

Mechanical:

case

Shockꢄ

Solꢃeraꢅilityꢄ

Terꢂinal Strengthꢄ

Viꢅrationꢄ

Solvent Resistanceꢄ

MIL-STD-883, Methoꢃ 2002, Conꢃition B

MIL-STD-883, Methoꢃ 2003

MIL-STD-202, Methoꢃ 211, Conꢃitions A & C

MIL-STD-883, Methoꢃ 2007, Conꢃition A

MIL-STD-202,Methoꢃ215

• This versatile HCMOS ꢁroꢃuct is also

availaꢅle as a 3V surface ꢂount ꢁlastic

version, a ꢂetal ꢃouꢅle sealeꢃ version,

anꢃ a gull wing (to 80 MHz) version

Resistance to Solꢃering Heatꢄ

MIL-STD-202, Methoꢃ 210, Conꢃition A, B or C

( I or J for Gull Wing)

Output Waveform

Environmental:

CMOS

TTL

Gross Leak Testꢄ

Fine Leak Testꢄ

MIL-STD-883, Methoꢃ 1014, Conꢃition C

MIL-STD-883, Methoꢃ 1014, Conꢃition A2

<5 x 10 ATMcc/sec

-8

1 Level

Therꢂal Shockꢄ

Moisture Resistanceꢄ

MIL-STD-883, Methoꢃ 1011, Conꢃition A

MIL-STD-883, Methoꢃ 1004

80% V

50% V

20% V

2.5 VDC

1.5 VDC

0.5 VDC

Tri-State Logic Table (NTH only)

0 Level

GND

SYMMETRY

Pin 1 Input

Logic 1 or NC

Logic 0 or GND

Pin 8 (5) Output

Oscillation

Required Input Levels on Pin 1:

Logic 1 = 3.0 V min

Logic 0 = 0.5V max

High Impedance

DS-104 REV D

3.7

SaRonix

141 Jefferson Drive • Menlo Park, CA 94303 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894

中文翻译

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