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NC7SZ38 PDF预览

NC7SZ38

更新时间: 2024-01-30 10:07:41
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
8页 107K
描述
TinyLogic UHS 2-Input NAND Gate (Open Drain Output)

NC7SZ38 数据手册

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October 1996  
Revised May 2003  
NC7SZ38  
TinyLogic UHS 2-Input NAND Gate (Open Drain Output)  
General Description  
Features  
The NC7SZ38 is a single 2-Input NAND Gate with open  
drain output stage from Fairchild’s Ultra High Speed Series  
of TinyLogic . The device is fabricated with advanced  
CMOS technology to achieve ultra high speed with high  
output drive while maintaining low static power dissipation  
over a very broad VCC operating range. The device is  
Space saving SOT23 or SC70 5-lead package  
Ultra small MicroPak leadless package  
Open Drain output stage for OR tied applications  
Ultra High Speed; tPD 2.4 ns Typ into 50 pF at 5V VCC  
High Output Sink Drive; 24 mA at 3V VCC  
Broad VCC Operating Range; 1.65V to 5.5V  
specified to operate over the 1.65V to 5.5V VCC range. The  
inputs and output are high impedance when VCC is 0V.  
Inputs tolerate voltages up to 6V independent of VCC oper-  
Matches the performance of LCX when operated at  
3.3V VCC  
ating voltage. The open drain output stage will tolerate volt-  
ages up to 6V independent of VCC when in the high  
Power down high impedance inputs/output  
Overvoltage Tolerant inputs facilitate 5V to 3V  
translation  
impedance state.  
Patented noise/EMI reduction circuitry implemented  
Ordering Code:  
Order  
Number  
Package  
Number  
MA05B  
Product Code  
Top Mark  
7Z38  
Package Description  
Supplied As  
NC7SZ38M5X  
NC7SZ38P5X  
NC7SZ38L6X  
5-Lead SOT23, JEDEC MO-178, 1.6mm  
3k Units on Tape and Reel  
MAA05A  
MAC06A  
Z38  
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3k Units on Tape and Reel  
A6  
6-Lead MicroPak, 1.0mm Wide  
5k Units on Tape and Reel  
Pin Descriptions  
Logic Symbol  
Pin Names  
Description  
Inputs  
IEEE/IEC  
A, B  
Y
Output  
NC  
No Connect  
Connection Diagrams  
Function Table  
Pin Assignments for SC70 and SOT23  
Y = AB  
Inputs  
Output  
A
L
B
L
Y
*H  
*H  
*H  
L
L
H
L
(Top View)  
H
H
H
Pad Assignment for MicroPak  
H = HIGH Logic Level  
L = LOW Logic Level  
*H = HIGH Impedance output state (Open Drain)  
(Top Thru View)  
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.  
MicroPak is a trademark of Fairchild Semiconductor Corporation.  
© 2003 Fairchild Semiconductor Corporation  
DS012175  
www.fairchildsemi.com  

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