LIST-XL Family
General Description
GENERAL DESCRIPTION
The MUSIC LIST-XL family consists of 256 word and 512
wordby64-bitcontent-addressablememory(CAM),idealfor
time critical applications requiring intensive list processing
where space and cost are important.
the database. The ability to search data words up to 64 bits
wide allows large address spaces to be searched rapidly and
efficiently. A patented architecture links each CAM entry to
associated data and makes this data available for use after a
successful compare operation.
Content-addressable memories, also known as associative
memories, operate in the converse way to random access
memories (RAM). In a RAM, the input to the device is an
address and the output is the data stored at that address. In a
CAM, the input is a data sample and the output is a flag to
indicate a match and the address of the matching data. As a
result, a CAM searches large databases for matching data in
ashort,constanttimeperiod,nomatterhowmanyentriesarein
TheMUSICLIST-XLisaninexpensivepowerfulsolutionfor
any application having to retrieve or translate data in a fast,
timedeterministicmanner.Itiswellsuitedtohandleandspeed
up functions usually done in software, such as data caches,
branch tables, LAN address processing, data translations,
high speed data filters, and algorithms having to search,
recognize, and make decisions on data or a data subset.
OPERATIONAL OVERVIEW
To use the LIST-XL, the user loads the data into the
Comparand register, which is automatically compared to all
valid CAM locations. The device then indicates whether or
not one or more of the valid CAM locations contains data
that matches the target data. Two validity bits at each
memory location determines the status of each CAM
location. The two bits are encoded to render four validity
conditions: Valid, Skip, Empty, and Random Access, as
shown in Table 1. The memory can be partitioned into
CAM and associated RAM segments on 16-bit boundaries,
but by using one of the two available mask registers, the
CAM/RAM partitioning can be set at any arbitrary size
between zero and 64 bits.
triggers a compare. Compares may also be initiated by a
command to the device. Associated RAM data is available
immediately after a successful compare operation. The
Status register reports the results of compares including all
flagsandaddresses.TwoMaskregistersareavailableandcan
be used in two different ways, to mask comparisons or to
maskdatawrites.Therandomaccessvaliditytype(seeTable
1) allows additional masks to be stored in the CAM array
where they may be retrieved rapidly.
A simple three-wire control interface and commands loaded
into the Instruction decoder control the device. A powerful
instructionsetincreasesthecontrolflexibilityandminimizes
software overhead. These and other features make the
LIST-XL a powerful associative memory that drastically
reduces search delays.
The LIST-XL's internal data path is 64 bits wide for rapid
internalcomparisonanddatamovement. Loadingdatatothe
Control, Comparand, and Mask registers automatically
Skip Bit
Empty Bit
Validity Type
Valid
0
0
1
1
0
0
0
1
Empty
Skip
RAM
DQ4
DQ5
VCC
GND
GND
DQ6
DQ7
NC
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
/MM
/MF
Table 1: Validity Bits vs Validity Types
VCC
GND
/RESET
VCC
/E
32-pin LQFP
(top view)
/CW
LOW
LOW
HIGH
HIGH
/CM
LOW
HIGH
LOW
HIGH
Cycle Type
Command Write Cycle
Data Write Cycle
/W
Command Read Cycle
Data Read Cycle
Table 2: I/O Cycles
2
Rev. 3.1
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