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MT9075 PDF预览

MT9075

更新时间: 2024-02-05 16:04:36
品牌 Logo 应用领域
MITEL /
页数 文件大小 规格书
78页 939K
描述
E1 Single Chip Transceiver

MT9075 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:QCCJ, LDCC68,1.0SQReach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.08
运营商类型:CEPT PCM-30/E-1JESD-30 代码:S-PQCC-J68
JESD-609代码:e0长度:24.23 mm
湿度敏感等级:1功能数量:1
端子数量:68最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC68,1.0SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):225电源:5 V
认证状态:Not Qualified座面最大高度:4.57 mm
子类别:Other Telecom ICs最大压摆率:0.15 mA
标称供电电压:5 V表面贴装:YES
技术:CMOS电信集成电路类型:FRAMER
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:24.23 mmBase Number Matches:1

MT9075 数据手册

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MT9075A  
E1 Single Chip Transceiver  
Preliminary Information  
ISSUE 5  
December 1997  
Features  
Combined PCM 30 framer, Line Interface Unit  
(LIU) and link controllers in a 68 pin PLCC or  
100 pin MQFP package  
Ordering Information  
MT9075AP  
MT9075AL  
68Pin PLCC  
100 Pin MQFP  
Selectable bit rate data link access with  
-40°C to 85°C  
optional S bits HDLC controller (HDLC0) and  
a
channel 16 HDLC controller (HDLC1)  
Description  
Enhanced performance monitoring and  
programmable error insertion functions  
The MT9075A is a single chip device which  
integrates an advanced PCM 30 framer with a Line  
Interface Unit (LIU).  
Low jitter DPLL for clock generation  
Operating under synchronized or free run mode  
Two-frame receive elastic buffer with controlled  
slip direction indication  
The framer interfaces to a 2.048 Mbit/s backplane  
and provides selectable rate data link access with  
Selectable transmit or receive jitter attenuator  
Intel or Motorola non-multiplexed parallel  
microprocessor interface  
optional HDLC controllers for S bits and channel 16.  
a
The LIU interfaces the framer functions to the PCM  
30 transformer-isolated four wire line.  
CRC-4 updating algorithm for intermediate path  
points of a message-based data link application  
ST-BUS/GCI 2.048 Mbit/s backplane bus for  
both data and signalling.  
The MT9075A meets or supports the latest ITU-T  
Recommendations including G.703, G.704, G.706,  
G.732, G.775, G.796, G.823 for PCM 30, and I.431  
for ISDN primary rate. It also meets or supports ETSI  
ETS 300 166 and BS 6450.  
Applications  
E1 add/drop multiplexers and channel banks  
CO and PBX equipment interfaces  
Primary Rate ISDN nodes  
Digital Cross-connect Systems (DCS)  
TxDL TxDLCLK  
TxMF  
TAIS  
DSTi  
CSTi  
ST-BUS  
Interface  
Transmit Framing, Error and  
Test Signal Generation  
TTIP  
TRING  
Line  
Driver  
Tdi  
Tdo  
Tms  
Tclk  
Trst  
PL Loop  
ST Loop  
National  
Bit Buffer  
MS/FR  
Jitter Attenuator  
& Clock Control  
IRQ  
M/S  
OSC1  
OSC2  
D7~D0  
Data Link,  
CAS  
Buffer  
AC4  
HDLC0,  
HDLC1  
~AC0  
DG Loop  
R/W/WR  
CS  
DS/RD  
RTIP  
RRING  
DSTo  
CSTo  
Receive Framing, Performance Monitoring,  
Alarm Detection, 2 Frame Slip Buffer  
ST-BUS  
Interface  
RxDLCLK RxDL RxMF  
LOS  
RxFP/Rx64kCK  
E2o F0b C4b  
Figure 1 - Functional Block Diagram  
4-129  

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