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MT5C6805EC-55/883C PDF预览

MT5C6805EC-55/883C

更新时间： 2024-01-18 14:14:27
品牌 Logo 应用领域
其他 - ETC 存储静态存储器
页数 文件大小 规格书
11页 114K
描述
16K x 4 SRAM SRAM MEMORY ARRAY

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MT5C6805EC-55/883C 数据手册

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SRAM  
MT5C6405  
Austin Semiconductor, Inc.  
16K x 4 SRAM  
PIN ASSIGNMENT  
(Top View)  
SRAM MEMORY ARRAY  
24-Pin DIP (C)  
(300 MIL)  
AVAILABLE AS MILITARY  
SPECIFICATIONS  
•
SMD 5962-86859  
A5  
A6  
1
2
3
4
5
6
7
8
9
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
Vcc  
A4  
• MIL-STD-883  
A7  
A3  
A8  
A2  
A9  
A1  
A10  
A11  
A12  
A13  
CE\ 10  
OE\ 11  
Vss 12  
A0  
FEATURES  
NC  
DQ4  
DQ3  
DQ2  
DQ1  
WE\  
• High Speed: 12, 15, 20, 25, 35, 45, 55, and 70ns  
• Battery Backup: 2V data retention  
• High-performance, low-power CMOS double-metal  
process  
• Single +5V (+10%) Power Supply  
• Easy memory expansion with CE\  
• All inputs and outputs are TTL compatible  
28-Pin LCC (EC)  
3
2 1 28 27  
OPTIONS  
• Timing  
MARKING  
26 NC  
25 A4  
24 A3  
23 A2  
22 A1  
21 A0  
20 DQ4  
19 DQ3  
18 DQ2  
A6  
A7  
A8  
4
5
6
7
8
A9  
12ns access  
15ns access  
20ns access  
25ns access  
35ns access  
45ns access  
55ns access  
70ns access  
-12  
-15  
-20  
-25  
-35  
-45*  
-55*  
-70*  
A10  
A11  
A12  
A13  
CE\  
9
10  
11  
12  
13 14 15 16 17  
• Package(s)  
Ceramic DIP (300 mil)  
Ceramic LCC  
GENERAL DESCRIPTION  
C
E C  
No. 106  
No. 204  
The Austin Semiconductor SRAM family employs  
high-speed, low-power CMOS designs using a four-transistor  
memory cell. Austin Semiconductor SRAMs are fabricated  
using double-layer metal, double-layer polysilicon  
technology.  
• Operating Temperature Ranges  
Industrial (-40oC to +85oC)  
Military (-55oC to +125oC)  
IT  
XT  
For flexibility in high-speed memory applications, Austin  
Semiconductor offers chip enable (CE\) and output enable  
(OE\) capability. These enhancements can place the outputs  
in High-Z for additional flexibility in system design.  
Writing to these devices is accomplished when write  
enable (WE\) and CE\ inputs are both LOW. Reading is  
accomplished when WE\ remains HIGH and CE\ and OE\ go  
LOW. The device offers a reduced power standby mode when  
disabled. This allows system designs to achieve low standby  
power requirements.  
• 2V data retention/low power  
L
*Electrical characteristics identical to those provided for the 35ns  
access devices.  
For more products and information  
please visit our web site at  
www.austinsemiconductor.com  
All devices operate from a single +5V power supply and  
all inputs and outputs are fully TTL compatible.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C6405  
Rev. 2.0 5/01  
1
1234567...11

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与MT5C6805EC-55/883C相关器件

型号 品牌 获取价格 描述 数据表
MT5C6805EC-55L/883C ETC

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 		16K x 4 SRAM SRAM MEMORY ARRAY
MT5C6805EC-70/883C MICROSS

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 		Standard SRAM, 16KX4, 70ns, CMOS, CQCC28, CERAMIC, LCC-28
MT5C6805EC-70L/883C MICROSS

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 		Standard SRAM, 16KX4, 70ns, CMOS, CQCC28, CERAMIC, LCC-28
MT5C6808C-12/883C MICROSS

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 		Standard SRAM, 8KX8, 12ns, CMOS, CDIP28, 0.300 INCH, CERAMIC, DIP-28
MT5C6808C-12L/883C MICROSS

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 		Standard SRAM, 8KX8, 12ns, CMOS, CDIP28, 0.300 INCH, CERAMIC, DIP-28
MT5C6808C-20/883C MICROSS

获取价格

 		Standard SRAM, 8KX8, 20ns, CMOS, CDIP28, 0.300 INCH, CERAMIC, DIP-28
MT5C6808C-20L/883C MICROSS

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 		Standard SRAM, 8KX8, 20ns, CMOS, CDIP28, 0.300 INCH, CERAMIC, DIP-28
MT5C6808C-35/883C MICROSS

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 		Standard SRAM, 8KX8, 35ns, CMOS, CDIP28, 0.300 INCH, CERAMIC, DIP-28
MT5C6808C-35L/883C MICROSS

获取价格

 		Standard SRAM, 8KX8, 35ns, CMOS, CDIP28, 0.300 INCH, CERAMIC, DIP-28
MT5C6808C-45/883C MICROSS

获取价格

 		Standard SRAM, 8KX8, 45ns, CMOS, CDIP28, 0.300 INCH, CERAMIC, DIP-28

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