Datasheet > MT58L128L18PT-5IT

MT58L128L18PT-5IT

更新时间： 2022-12-01 21:10:30

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器
页数	文件大小	规格书
25页	460K
描述
Cache SRAM, 128KX18, 3.5ns, CMOS, PQFP100, PLASTIC, MS-026BHA, TQFP-100

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MT58L128L18PT-5IT 数据手册

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2Mb : 128K x 18, 64K x 32/36

PIPELINED, SCD SYNCBURST SRAM

FUNCTIONALBLOCKDIAGRAM

128K x 18

ADDRESS

SA0, SA1, SA

MODE

SA0-SA1

SA1'

ADV#

CLK

BINARY

COUNTER AND

LOGIC

SA0'

CLR

ADSC#

ADSP#

BYTE “b”

WRITE DRIVER

BYTE “b”

WRITE REGISTER

OUTPUT

BUFFERS

BWb#

DQs

DQPa

DQPb

128K x 9 x 2

MEMORY

ARRAY

OUTPUT

REGISTERS

SENSE

AMPS

BYTE “a”

WRITE DRIVER

BYTE “a”

WRITE REGISTER

BWa#

BWE#

INPUT

REGISTERS

GW#

ENABLE

CE#

CE2

PIPELINED

ENABLE

CE2#

OE#

FUNCTIONALBLOCKDIAGRAM

64K x 32/36

ADDRESS

SA0, SA1, SA

MODE

SA0-SA1

SA1'

SA0'

BINARY

COUNTER

ADV#

CLK

CLR

ADSC#

ADSP#

BYTE “d”

WRITE DRIVER

BYTE “d”

WRITE REGISTER

BWd#

BWc#

64K x 8 x 4

(x32)

BYTE “c”

WRITE DRIVER

BYTE “c”

WRITE REGISTER

DQs

OUTPUT

BUFFERS

OUTPUT

REGISTERS

64K x 9 x 4

(x36)

DQPa

DQPb

DQPc

DQPd

SENSE

AMPS

BYTE “b”

WRITE DRIVER

MEMORY

ARRAY

BYTE “b”

WRITE REGISTER

BWb#

BYTE “a”

WRITE DRIVER

BYTE “a”

WRITE REGISTER

BWa#

BWE#

INPUT

REGISTERS

GW#

CE#

CE2

ENABLE

PIPELINED

ENABLE

CE2#

OE#

NOTE: Functional block diagrams illustrate simplified device operation. See truth table, pin descriptions, and timing diagrams

for detailed information.

2Mb:128Kx18, 64Kx32/36Pipelined, SCDSyncBurstSRAM

MT58L128L18P_2.p65 – Rev. 3/00

MicronTechnology,Inc.,reservestherighttochangeproductsorspecificationswithoutnotice.

123 4 5 6 7...25

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