4 MEG x 4
FPM DRAM
MT4LC4M4B1, MT4C4M4B1
MT4LC4M4A1, MT4C4M4A1
For the latest data sheet, please refer to the Micron Web
site: www.micronsemi.com/mti/msp/html/datasheet.html
DRAM
FEATURES
• In dustry-stan dard x4 pin out, tim in g, fun ction s,
an d packages
PIN ASSIGNMENT (To p Vie w )
• High -perform an ce, low-power CMOS silicon -gate
process
• Sin gle power supply (+3.3V ±0.3V or +5V ±0.5V)
• All in puts, outputs an d clocks are TTL-com patible
• Refresh m odes: RAS#-ONLY, HIDDEN an d CAS#-
BEFORE-RAS# (CBR)
• Option al self refresh (S) for low-power data
reten tion
• 11 row, 11 colum n addresses (2K refresh ) or
12 row, 10 colum n addresses (4K refresh )
• FAST-PAGE-MODE (FPM) access
• 5V toleran t in puts an d I/Os on 3.3V devices
24/26-Pin SOJ
24/26-Pin TSOP
V
DQ0
DQ1
WE#
RAS#
CC
1
2
3
4
5
6
26
25
24
23
22
21
VSS
V
DQ0
DQ1
WE#
RAS#
CC
1
2
3
4
5
6
26
25
24
23
22
21
VSS
DQ3
DQ2
CAS#
OE#
A9
DQ3
DQ2
CAS#
OE#
A9
**NC/A11
**NC/A11
A10
A0
A1
A2
A3
8
9
10
11
12
13
19
18
17
16
15
14
A8
A7
A6
A5
A4
A10
A0
A1
A2
A3
8
9
10
11
12
13
19
18
17
16
15
14
A8
A7
A6
A5
A4
V
CC
VSS
V
CC
VSS
OPTIONS
• Voltage
MARKING
3.3V
5V
LC
C
**NC on 2K refresh and A11 on 4K refresh options.
• Refresh Addressin g
2,048 (2K) rows
4,096 (4K) rows
• Packages
B1
A1
4 MEG x 4 FPM DRAM PART NUMBERS
Plastic SOJ (300 m il)
Plastic TSOP (300 m il)
• Tim in g
50n s access
60n s access
• Refresh Rates
Stan dard Refresh
Self Refresh (128m s period)
D J
TG
REFRESH
PARTNUMBER
VCC ADDRESSING PACKAGE REFRESH
MT4LC4M4B1DJ-6
3.3V
2K
2K
2K
2K
4K
4K
4K
4K
2K
2K
2K
2K
4K
4K
4K
4K
SOJ
SOJ
Standard
Self
-5
-6
MT4LC4M4B1DJ-6 S 3.3V
MT4LC4M4B1TG-6 3.3V
MT4LC4M4B1TG-6 S 3.3V
MT4LC4M4A1DJ-6 3.3V
MT4LC4M4A1DJ-6 S 3.3V
MT4LC4M4A1TG-6 3.3V
MT4C4M4A1TG-6S 3.3V
TSOP
TSOP
SOJ
Standard
Self
Non e
S*
Standard
Self
SOJ
NOTE: 1. Th e 4 Meg x 4 FPM DRAM base n um ber differen ti-
ates th e offerin gs in on e place—MT4LC4M4B1. Th e
fifth field distin guish es various option s: B1
design ates a 2K refresh an d A1 design ates a 4K
refresh for FPM DRAMs.
TSOP
TSOP
SOJ
Standard
Self
MT4C4M4B1DJ-6
MT4C4M4B1DJ-6 S
MT4C4M4B1TG-6
5V
5V
5V
Standard
Self
SOJ
2. Th e # sym bol in dicates sign al is active LOW.
TSOP
TSOP
SOJ
Standard
Self
*Con tact factory for availability
MT4C4M4B1TG-6S 5V
MT4C4M4A1DJ-6 5V
MT4C4M4A1DJ-6 S 5V
MT4C4M4A1TG-6 5V
MT4C4M4A1TG-6S 5V
Standard
Self
Part Number Example:
SOJ
MT4LC4M4B1DJ
TSOP
TSOP
Standard
Self
KEY TIMING PARAMETERS
t
t
t
t
t
t
SPEED
-5
RC
RAC
PC
AA
CAC
RP
84ns
50ns
60ns
20ns
35ns
25ns
30ns
13ns
15ns
30ns
40ns
-6
110ns
4 Meg x 4 FPM DRAM
D49_5V.p65 – Rev. 5/00
Micron Technology, Inc., reservesthe right to change productsor specificationswithout notice.
©2000, Micron Technology, Inc.
1