‡
ADVANCE
64Mb: x16, x32
SYNCFLASH MEMORY
SYNCFLASH®
MEMORY
MT28S4M16B1LC – 1 Meg x 16 x 4 banks
MT28S2M32B1LC – 512K x 32 x 4 banks
FEATURES
• PC133 SDRAM-compatible read timing
• Fully synchronous; all signals registered on
positive edge of system clock
PINASSIGNMENT(TopView)
86-PinTSOP
x32
x16
x16
x32
• Internal pipelined operation; column address can
be changed every clock cycle
• Internal banks for hiding row access
• Programmable burst lengths:
VCC
DQ0
VCCQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VCCQ
DQ5
DQ6
VSSQ
DQ7
NC
1
2
3
4
5
6
7
8
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
VCC
DQ0
VCCQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VCCQ
DQ5
DQ6
VSSQ
DQ7
NC
V
SS
VSS
DQ15
VSSQ
DQ14
DQ13
VCCQ
DQ12
DQ11
VSSQ
DQ10
DQ9
DQ15
VSSQ
DQ14
DQ13
VCCQ
DQ12
DQ11
VSSQ
DQ10
DQ9
VCCQ
DQ8
NC
1, 2 , 4, 8, or full page (read)
1, 2, 4, or 8 (write)
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
• LVTTL-compatible inputs and outputs
• Single 3.0V–3.6V power supply
Additional VHH hardware protect mode (RP#)
• Supports CAS latency of 1, 2, and 3
• Four-bank architecture supports true concurrent
operation with zero latency
Read any bank while programming or erasing
any other bank
• Deep power-down mode: 50µA (MAX)
• Cross-compatible Flash memory command set
VCCQ
DQ8
NC
VCC
VCC
VSS
VSS
DQM0
WE#
CAS#
RAS#
CS#
NC
BA0
BA1
A10
A0
A1
DQM0
WE#
CAS#
RAS#
CS#
DQM1 DQM1
DNU
NC
CLK
CKE
A9
A8
A7
A6
A5
A4
A3
A9
NC
CLK
CKE
A11
A8
A7
A6
A5
A4
A3
NC
BA0
BA1
A10
A0
A1
A2
MCL
VCC
A2
DQM2
VCC
DQM3 MCL
VSS
VSS
RP#
RP#
VCCP
DQ31
VCCQ
DQ30
DQ29
VSSQ
DQ28
DQ27
VCCQ
DQ26
DQ25
VSSQ
DQ24
VSS
VCCP
DNU
VCCQ
DNU
DNU
VSSQ
DNU
DNU
VCCQ
DNU
DNU
VSSQ
DNU
VSS
DQ16
VSSQ
DQ17
DQ18
VCCQ
DQ19
DQ20
VSSQ
DQ21
DQ22
VCCQ
DQ23
VCC
DNU
VSSQ
DNU
DNU
VCCQ
DNU
DNU
VSSQ
DNU
DNU
VCCQ
DNU
VCC
OPTIONS
• Configuration
MARKING
4 Meg x 16 (1 Meg x 16 x 4 banks)
2 Meg x 32 (512K x 32 x 4 banks)
4M16
2M32
• Read Timing (Cycle Time)
5.4ns @ CL3 (143 MHz)
5.4ns @ CL3 (133 MHz)
-7E
-75
NOTE: 1. The # symbol indicates signal is active LOW.
• Packages
2. FBGA ball assignment is on the next page.
86-pin OCPL2 TSOP (400 mil)
90-ball FBGA
TG
FG
KEYTIMINGPARAMETERS
• Operating Temperature Range
Commercial (0ºC to +70ºC)
Extended (-40ºC to +85ºC)
None
ET1
ACCESS
SPEED
CLOCK
TIME
SETUP HOLD
TIME
GRADE FREQUENCY CL = 2* CL = 3* TIME
NOTE: 1. Contact factory for availability.
-7E
-7E
-75
-75
143 MHz
133 MHz
133 MHz
100 MHz
5.4ns 1.5ns 0.8ns
1.5ns 0.8ns
2. Off-center parting line.
5.4ns
6ns
Part Number Example:
5.4ns 1.5ns 0.8ns
1.5ns 0.8ns
MT28S4M16B1LCTG-7E
* CL = CAS (READ) Latency
64Mb: x16, x32 SyncFlash
MT28S4M16B1LC_2.p65 – Rev. 2, Pub. 4/02
©2002,MicronTechnology,Inc.
1
‡
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONLY AND ARE SUBJECT TO CHANGE BY
MICRONWITHOUTNOTICE.PRODUCTSAREONLYWARRANTEDBYMICRONTOMEETMICRON’SPRODUCTIONDATASHEETSPECIFICATIONS.
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