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MPC8321ZQAFDC

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恩智浦 - NXP /
页数 文件大小 规格书
82页 1309K
描述
8321 PBGA W/O ENCR

MPC8321ZQAFDC 数据手册

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Document Number: MPC8323EEC  
Rev. 4, 09/2010  
Freescale Semiconductor  
Technical Data  
MPC8323E  
PowerQUICC II Pro Integrated  
Communications Processor  
Family Hardware Specifications  
Contents  
This document provides an overview of the MPC8323E  
1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
PowerQUICC II Pro processor features. The MPC8323E is a  
cost-effective, highly integrated communications processor  
that addresses the requirements of several networking  
applications, including ADSL SOHO and residential  
gateways, modem/routers, industrial control, and test and  
measurement applications. The MPC8323E extends current  
PowerQUICC offerings, adding higher CPU performance,  
additional functionality, and faster interfaces, while  
addressing the requirements related to time-to-market, price,  
power consumption, and board real estate. This document  
describes the MPC8323E, and unless otherwise noted, the  
information also applies to the MPC8323, MPC8321E, and  
MPC8321.  
2. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . 6  
3. Power Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 9  
4. Clock Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
5. RESET Initialization . . . . . . . . . . . . . . . . . . . . . . . . . 11  
6. DDR1 and DDR2 SDRAM . . . . . . . . . . . . . . . . . . . . 13  
7. DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
8. Ethernet and MII Management . . . . . . . . . . . . . . . . . 19  
9. Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26  
10. JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
11. I2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33  
12. PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35  
13. Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37  
14. GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38  
15. IPIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39  
16. SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40  
17. TDM/SI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41  
18. UTOPIA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43  
19. HDLC, BISYNC, Transparent, and Synchronous  
To locate published errata or updates for this document, refer  
to the MPC8323E product summary page on our website  
listed on the back cover of this document or contact your  
local Freescale sales office.  
UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45  
20. USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48  
21. Package and Pin Listings . . . . . . . . . . . . . . . . . . . . . 49  
22. Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64  
23. Thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71  
24. System Design Information . . . . . . . . . . . . . . . . . . . 76  
25. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 79  
26. Document Revision History . . . . . . . . . . . . . . . . . . . 80  
© 2010 Freescale Semiconductor, Inc. All rights reserved.  

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