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MP7542SD PDF预览

MP7542SD

更新时间: 2024-11-10 22:36:39
品牌 Logo 应用领域
艾科嘉 - EXAR 转换器
页数 文件大小 规格书
12页 111K
描述
5 V CMOS 4-Bit Input, 12-Bit Digital-to-Analog Converter

MP7542SD 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:unknown
ECCN代码:3A001.A.2.CHTS代码:8542.39.00.01
风险等级:5.29最大模拟输出电压:10 V
转换器类型:D/A CONVERTER输入位码:BINARY
输入格式:PARALLEL, 4 BITSJESD-30 代码:R-GDIP-T16
JESD-609代码:e0长度:19.05 mm
最大线性误差 (EL):0.0244%位数:12
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
座面最大高度:5.08 mm最大稳定时间:2 µs
子类别:Other Converters最大压摆率:2.5 mA
标称供电电压:5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm

MP7542SD 数据手册

 浏览型号MP7542SD的Datasheet PDF文件第2页浏览型号MP7542SD的Datasheet PDF文件第3页浏览型号MP7542SD的Datasheet PDF文件第4页浏览型号MP7542SD的Datasheet PDF文件第5页浏览型号MP7542SD的Datasheet PDF文件第6页浏览型号MP7542SD的Datasheet PDF文件第7页 
MP7542  
5 V CMOS  
4-Bit Input, 12-Bit  
Digital-to-Analog Converter  
FEATURES  
12-Bit DAC with a 4-Bit Parallel Address for 4 & 8-Bit  
Microprocessor or Microcontroller Interface  
Nonlinearity +1/2 LSB Tmin to Tmax  
Latch-Up Free  
+5 V Supply Operation  
Low Power Consumption: 40mW Max.  
Low Cost  
Serial Version: MP7543  
Low Sensitivity to Output Amplifier V  
Low Output Capacitance  
OS  
cycle of a static RAM. A CLEAR input allows the 12-bit DAC reg-  
ister to be reset to all zeros.  
GENERAL DESCRIPTION  
The MP7542 is a precision, 12-bit CMOS 4-quadrant multi-  
plying Digital-to-Analog Converter designed for direct interface  
to 4 and 8-bit microprocessors.  
The MP7542 is manufactured using advanced thin-film on  
monolithic double metal CMOS fabrication process. A unique  
decoding technique is utilized yielding excellent accuracy and  
stability.  
The MP7542 consists of three 4-bit registers, a 12-bit DAC  
register, address decoding logic, and a 12-bit CMOS multiplying  
DAC. Data is loaded into the data registers in three 4-bit nibbles  
andsubsequentlytransferredtothe12-bitDACregister. Alldata  
loading or data transfer operations are identical to the WRITE  
The MP7542 reduces the additional linearity errors due to  
output amplifier offset to only 330µV per millivolt of offset versus  
670 µV for the standard R-2R ladder CMOS DACs.  
SIMPLIFIED BLOCK DIAGRAM  
V
REF  
R
FB  
I
I
OUT1  
12-Bit Multiplying DAC  
12-Bit DAC Register  
OUT2  
AGND  
CLR  
V
DD  
WR  
CS  
A0  
DGND  
H-Byte  
Data  
Register  
M-Byte  
Data  
Register  
L-Byte  
Data  
Register  
Address  
Decode  
Logic  
A1  
DB0 (LSB)  
DB1  
DB2  
DB3 (MSB)  
Rev. 2.00  
1

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