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MN101D06G PDF预览

MN101D06G

更新时间: 2024-11-14 22:46:07
品牌 Logo 应用领域
松下 - PANASONIC 微控制器和处理器外围集成电路时钟
页数 文件大小 规格书
5页 118K
描述
RESET

MN101D06G 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:QFP
包装说明:18 X 18 MM, LEAD FREE, PLASTIC, QFP-100针数:100
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.77Is Samacsys:N
具有ADC:YES其他特性:OPERATES AT 2.2V MINIMUM SUPPLY AT 32 KHZ
地址总线宽度:位大小:8
CPU系列:MN101C00最大时钟频率:14.32 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:JESD-30 代码:S-PQFP-G100
长度:18 mmI/O 线路数量:77
端子数量:100PWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP100,.9SQ封装形状:SQUARE
封装形式:FLATPACK峰值回流温度(摄氏度):NOT SPECIFIED
电源:3/5 V认证状态:Not Qualified
RAM(字节):4096ROM(单词):131072
ROM可编程性:MROM座面最大高度:2.85 mm
速度:14.32 MHz子类别:Microcontrollers
最大压摆率:100 mA最大供电电压:5.5 V
最小供电电压:3 V标称供电电压:5 V
表面贴装:YES技术:CMOS
端子形式:GULL WING端子节距:0.65 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:18 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

MN101D06G 数据手册

 浏览型号MN101D06G的Datasheet PDF文件第2页浏览型号MN101D06G的Datasheet PDF文件第3页浏览型号MN101D06G的Datasheet PDF文件第4页浏览型号MN101D06G的Datasheet PDF文件第5页 
ROM (×8-bit)  
                                  
                                  
MN101D06F , MN101D06G , MN101D06H  
MN101D06F  
MN101D06G  
MN101D06H  
160 K  
Type  
96 K  
128 K  
3 K  
4 K  
5 K  
RAM (×8-bit)  
*Lead-free  
QFP100-P-1818B  
Package  
Minimum Instruction  
Execution Time  
With main clock operated  
When sub-clock operated  
0.1397 µs (at 4.0 V to 5.5 V, 14.32 MHz)  
71.5 µs (at 3.0 V to 5.5 V fixed to 14.32 MHz internal frequency division)  
61 µs (at 2.2 V to 5.5 V, 32.768 kHz)  
• RESET • Runaway • External 0 • External 1 • External 2 • External 3 • External 4 • key input (P50 to 54)  
• Timer 0 • Timer 1 • Timer 2 • Timer 3 • Timer 4 • Timer 6 • Capstan FG • Control • HSW  
• Cylinder(Drum) FG • Servo V-sync • Synchronous output • OSD • XDS • Serial 0 • Serial 1 • Serial 2  
• A/D (common with PWM 4 reference frequency) • OSD V-sync  
Interrupts  
Timer counter 0: 16-bit × 1  
Timer Counter  
(timer function, clock function [max. 2 s or max. 36 h at cascade-connecting with timer 6])  
Clock source ····················· 1/2, (1/4,) 1/8, (1/16) of system clock frequency; overflow of timer counter 6;  
1/512 of XI oscillation clock or OSC oscillation clock frequency  
Interrupt source ················ overflow of timer counter 0  
Timer counter 1: 16-bit × 1 (timer function, linear timer counter function)  
Clock source ····················· 1/2, (1/4,) 1/8, (1/16) of system clock frequency; CTL signal  
Interrupt source ················ overflow of timer counter 1  
Timer counter 2: 16-bit × 1 (timer function, input capture, duty judgment of CTL signal(VISS/VASS detection function))  
Clock source ····················· 1/2, (1/4,) 1/8, (1/16,) 1/12, (1/24) of system clock frequency  
Interrupt source ················ overflow of timer counter 2; input of CTL specified edge; underflow of timer 2  
shift register 4-bit counter; coincidence of timer 2 shift register with timer 2  
shift register compare register  
Timer counter 3: 16-bit × 1  
(timer function, detection of serial indexing, generation of remote control output carrier frequency)  
Clock source ····················· 1/2, (1/4,) 1/8, (1/16) of system clock frequency; XI oscillation clock  
Interrupt source ················ overflow of timer counter 3  
Timer counter 4: 16-bit × 1 (timer function, event count [P15 input], generation of serial transmission clock)  
Clock source ····················· 1/8, (1/16) of system clock frequency; external clock input  
Interrupt source ················ overflow of timer counter 4; coincidence of timer counter 4 with OCR4  
Timer counter 5: 19-bit × 1 (watchdog, stable oscillation waiting function)  
Clock source ····················· system clock  
Watchdog interrupt source ·· 1/216, 1/219 of timer counter 5 frequency  
Clear by stable oscillation ·· after 256 counts by timer counter 5 (218 counts of OSC oscillation clock)  
Timer counter 6: 16-bit × 1 (clock function [max. 2 s])  
Clock source ····················· 1/512 of OSC oscillation clock frequency; XI oscillation clock;  
1/4, (1/8,) 1/64, (1/128) of system clock frequency  
Interrupt source ················ 1/213, 1/214, 1/215 overflow of timer counter 6  
Timer counter 7: 8-bit × 1 or 4-bit × 2 (timer function, event count)  
Clock source ····················· 1/4, (1/8,) 1/16, (1/32) of system clock frequency; external clock input  
Interrupt source ················ overflow of timer counter 7 (although when 4-bit × 2, there is one interrupt vector. )  
Serial 0: 8-bit × 1 (synchronous type/start-stop synchronous type) (transfer direction of MSB/LSB selectable)  
Synchronous type clock source 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of system clock frequency;  
2-division timer 4 output; NSBT0 pin input  
Serial Interface  
Clock for UART ·············· 8-division of above clock; 2-division timer 4 output; NSBT0 pin input  
MAD00029FEM  

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