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MMA1220DR2 PDF预览

MMA1220DR2

更新时间: 2024-11-09 04:15:03
品牌 Logo 应用领域
飞思卡尔 - FREESCALE 光电二极管机械
页数 文件大小 规格书
10页 277K
描述
Low G Micromachined Accelerometer

MMA1220DR2 数据手册

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Document Number: MMA1220D  
Rev 3, 03/2006  
Freescale Semiconductor  
Technical Data  
Low G  
MMA1220  
Micromachined Accelerometer  
The MMA series of silicon capacitive, micromachined accelerometers feature  
signal conditioning, a 4-pole low pass filter and temperature compensation.  
Zero-g offset full scale span and filter cut-off are factory set and require no  
external devices. A full system self-test capability verifies system functionality.  
MMA1220D: Z AXIS SENSITIVITY  
MICROMACHINED  
ACCELEROMETER  
±8g  
Features  
Integral Signal Conditioning  
Linear Output  
Ratiometric Performance  
4th Order Bessel Filter Preserves Pulse Shape Integrity  
Calibrated Self-test  
Low Voltage Detect, Clock Monitor, and EPROM Parity Check Status  
Transducer Hermetically Sealed at Wafer Level for Superior Reliability  
Robust Design, High Shocks Survivability  
Typical Applications  
Vibration Monitoring and Recording  
Appliance Control  
D SUFFIX  
EG SUFFIX (Pb-FREE)  
16-LEAD SOIC  
Mechanical Bearing Monitoring  
Computer Hard Drive Protection  
Computer Mouse and Joysticks  
Virtual Reality Input Devices  
Sport Diagnostic Devices and Systems  
CASE 475-01  
ORDERING INFORMATION  
Device Name  
MMA1220D  
Temperature Range  
40° to 125°C  
Case No.  
475-01  
475-01  
475-01  
475-01  
Package  
SOIC-16  
MMA1220DR2  
MMA1220EG  
MMA1220EGR2  
40° to 125°C  
SOIC16, Tape & Reel  
SOIC-16  
40° to 125°C  
40° to 125°C  
SOIC16, Tape & Reel  
VDD  
16  
15  
14  
13  
12  
11  
10  
9
N/C  
N/C  
N/C  
ST  
N/C  
N/C  
N/C  
N/C  
N/C  
N/C  
N/C  
N/C  
1
2
3
4
5
6
7
8
Temp Comp  
and Gain  
G-Cell  
Sensor  
VOUT  
Integrator  
Gain  
Filter  
VOUT  
ST  
Control Logic &  
EPROM Trim Circuits  
Clock  
Generator  
STATUS  
VSS  
Oscillator  
Self-test  
VSS  
VDD  
STATUS  
Figure 2. Pin Connections  
Figure 1. Simplified Accelerometer Functional Block Diagram  
© Freescale Semiconductor, Inc., 2006. All rights reserved.  

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