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MM74HCT244WMX PDF预览

MM74HCT244WMX

更新时间: 2024-11-24 11:11:47
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
9页 296K
描述
八通道3态缓冲器

MM74HCT244WMX 技术参数

是否无铅: 不含铅生命周期:Active
包装说明:SOP, SOP20,.4Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:0.37
控制类型:ENABLE LOW系列:HCT
JESD-30 代码:R-PDSO-G20JESD-609代码:e3
长度:12.8 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.006 A
湿度敏感等级:1位数:4
功能数量:2端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:25 ns
传播延迟(tpd):35 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN (SN)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
Base Number Matches:1

MM74HCT244WMX 数据手册

 浏览型号MM74HCT244WMX的Datasheet PDF文件第2页浏览型号MM74HCT244WMX的Datasheet PDF文件第3页浏览型号MM74HCT244WMX的Datasheet PDF文件第4页浏览型号MM74HCT244WMX的Datasheet PDF文件第5页浏览型号MM74HCT244WMX的Datasheet PDF文件第6页浏览型号MM74HCT244WMX的Datasheet PDF文件第7页 
DATA SHEET  
www.onsemi.com  
Inverting Octal 3-STATE  
Buffer, Octal 3-STATE Buffer  
MM74HCT240,  
MM74HCT244  
SOIC20 WB  
CASE 751D05  
TSSOP20 WB  
CASE 948E  
TSSOP20  
CASE 948AQ  
General Description  
MARKING DIAGRAMS  
The MM74HCT240 and MM74HCT244 3STATE buffers utilize  
advanced silicongate CMOS technology and are general purpose  
high speed inverting and noninverting buffers. They possess high  
drive current outputs which enable high speed operation even when  
driving large bus capacitances. These circuits achieve speeds  
comparable to low power Schottky devices, while retaining the low  
power consumption of CMOS. All three devices are TTL input  
compatible and have a fanout of 15 LSTTL equivalent inputs.  
MM74HCT devices are intended to interface between TTL and  
NMOS components and standard CMOS devices. These parts are also  
plugin replacements for LSTTL devices and can be used to reduce  
power consumption in existing designs.  
20  
1
20  
XXX  
XXXXXX  
AWLYYWWG  
XXX  
ALYWG  
G
1
XXXXX = Specific Device Code  
A
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
L/WL  
Y/YY  
W/WW  
G or G  
The MM74HCT240 is an inverting buffer and the MM74HCT244 is  
a noninverting buffer. Each device has two active low enables (1G  
and 2G), and each enable independently controls 4 buffers.  
All inputs are protected from damage due to static discharge by  
(Note: Microdot may be in either location)  
CONNECTION DIAGRAMS  
Pin Assignment for SOIC and TSSOP  
diodes to V and ground.  
CC  
Features  
TTL Input Compatible  
Typical Propagation Delay: 14 ns  
3STATE Outputs for Connection to System Buses  
Low Quiescent Supply Current: 160 mA  
High Output Drive Current: 6 mA (min)  
These are PbFree Devices  
TRUTH TABLES  
MM74HCT240  
MM74HCT240 (Top View)  
1G  
1A  
L
1Y  
H
L
2G  
L
2A  
L
2Y  
H
L
L
L
H
L
L
H
L
H
Z
H
H
Z
H
H
Z
H
Z
MM74HCT244  
1G  
L
1A  
L
1Y  
L
2G  
L
2A  
L
2Y  
L
L
H
L
H
Z
L
H
L
H
Z
MM74HCT244 (Top View)  
H
H
H
H
H
Z
H
Z
ORDERING INFORMATION  
See detailed ordering, marking and shipping information in the  
package dimensions section on page 5 of this data sheet.  
NOTES: H = HIGH Level  
L = LOW Level  
Z = High Impedance  
© Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
November, 2022 Rev. 2  
MM74HCT244/D  

MM74HCT244WMX 替代型号

型号 品牌 替代类型 描述 数据表
MM74HCT244WM ONSEMI

完全替代

八通道3态缓冲器
SN74HCT244DWR TI

类似代替

OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SN74HCT244DW TI

类似代替

OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

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八路 3 态收发器