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MM74HCT245WM_NL

更新时间： 2024-11-19 20:01:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管逻辑集成电路
页数 文件大小 规格书
8页 103K
描述
Bus Transceiver, HCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 0.300 INCH, LEAD FREE, MS-013, SOIC-20

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MM74HCT245WM_NL 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP,针数：20
Reach Compliance Code：unknown风险等级：5.65
系列：HCTJESD-30 代码：R-PDSO-G20
JESD-609代码：e3长度：12.8015 mm
逻辑集成电路类型：BUS TRANSCEIVER位数：8
功能数量：1端口数量：2
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE传播延迟（tpd）：38 ns
认证状态：Not Qualified座面最大高度：2.65 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：MATTE TIN端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
宽度：7.5 mmBase Number Matches：1

MM74HCT245WM_NL 数据手册

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February 1984  
Revised May 2005  
MM74HCT245  
Octal 3-STATE Transceiver  
General Description  
Features  
The MM74HCT245 3-STATE bi-directional buffer utilizes  
advanced silicon-gate CMOS technology and is intended  
for two-way asynchronous communication between data  
buses. It has high drive current outputs which enable high  
speed operation even when driving large bus capaci-  
tances. This circuit possesses the low power consumption  
of CMOS circuitry, yet has speeds comparable to low  
power Schottky TTL circuits.  
■ TTL input compatible  
■ 3-STATE outputs for connection to system busses  
■ High output drive current: 6 mA (min)  
■ High speed: 16 ns typical propagation delay  
■ Low power: 80 A (74HCT Series)  
This device is TTL input compatible and can drive up to 15  
LS-TTL loads, and all inputs are protected from damage  
due to static discharge by diodes to VCC and ground.  
The MM74HCT245 has one active low enable input (G),  
and a direction control (DIR). When the DIR input is HIGH,  
data flows from the A inputs to the B outputs. When DIR is  
LOW, data flows from B to A.  
MM74HCT devices are intended to interface between TTL  
and NMOS components and standard CMOS devices.  
These parts are also plug-in replacements for LS-TTL  
devices and can be used to reduce power consumption in  
existing designs.  
Ordering Code:  
Order Number  
MM74HCT245WM  
MM74HCT245SJ  
MM74HCT245MTC  
MM74HCT245N  
Package Number  
M20B  
Package Description  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
M20D  
MTC20  
N20A  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Truth Table  
Pin Assignments for DIP, SOIC, SOP and TSSOP  
Control  
Inputs  
Operation  
G
L
DIR  
L
245  
B data to A bus  
A data to B bus  
isolation  
L
H
H
X
H
L
X
HIGH Level  
LOW Level  
Irrelevant  
Top View  
© 2005 Fairchild Semiconductor Corporation  
DS005366  
www.fairchildsemi.com  
12345678

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MM74HCT245WM_NL 替代型号

型号 品牌 替代类型 描述 数据表
CD74HCT245M TI

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 High Speed CMOS Logic Octal-Bus Transceiver, Three-State, Non-Inverting
SN74HCT245DWR TI

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 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74HCT245DW TI

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 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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