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MM74HCT05J PDF预览

MM74HCT05J

更新时间: 2024-11-20 14:53:47
品牌 Logo 应用领域
德州仪器 - TI 输入元件逻辑集成电路触发器
页数 文件大小 规格书
4页 107K
描述
HCT SERIES, HEX 1-INPUT INVERT GATE, CDIP14, CERAMIC, DIP-14

MM74HCT05J 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:DIP, DIP14,.3Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.18
Is Samacsys:N系列:HCT
JESD-30 代码:R-GDIP-T14JESD-609代码:e0
长度:19.43 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER功能数量:6
输入次数:1端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:OPEN-DRAIN封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
传播延迟(tpd):28 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:5.08 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

MM74HCT05J 数据手册

 浏览型号MM74HCT05J的Datasheet PDF文件第2页浏览型号MM74HCT05J的Datasheet PDF文件第3页浏览型号MM74HCT05J的Datasheet PDF文件第4页 
January 1988  
MM54HCT05/MM74HCT05  
Hex Inverter (Open Drain)  
General Description  
The MM54HCT05/MM74HCT05 are logic functions fabri-  
cated by using advanced silicon-gate CMOS technology,  
which provides the inherent benefits of CMOSÐlow quies-  
cent power and wide power supply range. These devices  
are also input and output characteristic and pinout compati-  
ble with standard DM54LS/DM74LS logic families. The  
MM54HCT05/MM74HCT05 open drain Hex Inverter re-  
quires the addition of an external resistor to perform a wire-  
NOR function.  
MM54HCT/MM74HCT devices are intended to interface be-  
tween TTL and NMOS components and standard CMOS  
devices. These parts are also plug-in replacements for LS-  
TTL devices and can be used to reduce power consumption  
in existing designs.  
Features  
Y
Open drain for wire-NOR function  
Y
LS-TTL pinout and threshold compatible  
All inputs are protected from static discharge damage by  
and ground.  
Y
Fanout of 10 LS-TTL loads  
internal diodes to V  
CC  
Y
Typical propagation delays:  
t
t
(with 1 kX resistor) 10 ns  
(with 1 kX resistor) 8 ns  
PLH  
PHL  
Connection Diagram  
Dual-In-Line Package  
TL/F/5358–1  
Top View  
Order Number MM54HCT05 or MM74HCT05  
Logic Diagram  
Typical Application  
TL/F/5358–3  
TL/F/5358–2  
Note: Can be extended to more than 2 inputs.  
C
1995 National Semiconductor Corporation  
TL/F/5358  
RRD-B30M105/Printed in U. S. A.  

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