January 1988
MM54HC4511/MM74HC4511
BCD-to-7 Segment Latch/Decoder/Driver
General Description
Features
Y
Latch storage of input data
This high speed latch/decoder/driver utilizes advanced sili-
con-gate CMOS technology. It has the high noise immunity
and low power consumption of standard CMOS integrated
circuits, as well as the ability to drive 10 LS-TTL loads. The
circuit provides the functions of a 4-bit storage latch, an
8421 BCD-to-seven segment decoder, and an output drive
capability. Lamp test (LT), blanking (Bl), and latch enable
(LE) inputs are used to test the display, to turn-off or pulse
modulate the brightness of the display, and to store a BCD
code, respectively. It can be used with seven-segment light
emitting diodes (LED), incandescent, fluorescent, gas dis-
charge, or liquid crystal readouts either directly or indirectly.
Y
Blanking input
Y
Lamp test input
Y
Low power consumption characteristics of CMOS
devices
Y
Y
Y
Wide operating voltage range: 2 to 6 volts
Low input current: 1 mA maximum
Low quiescent current: 80 mA maximum over full tem-
perature range (74 Series)
Applications include instrument (e.g., counter, DVM, etc.)
display driver, computer/calculator display driver, cockpit
display driver, and various clock, watch, and timer uses.
The 54HC/74HC logic family is speed, function, and pinout
compatible with the standard 54LS/74LS logic family. All
inputs are protected from damage due to static discharge by
internal diode clamps to V
and ground.
CC
Connection Diagram
Truth Table
Dual-In-Line Package
INPUTS
OUTPUTS
LE BI LT
D
C
B
A
a
b
c
d
e
f
g
DISPLAY
8
x
x
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
x
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
x
x
x
x
x
x
x
x
H
L
H
L
H
H
L
H
L
H
H
H
L
L
L
L
L
L
H
L
H
H
H
H
H
L
L
H
H
H
L
L
L
L
L
L
H
L
H
L
H
L
H
H
L
H
H
L
H
L
L
L
L
L
L
L
*
H
L
H
L
H
L
L
L
H
L
H
L
L
L
L
L
L
L
H
L
H
L
L
L
H
H
H
L
H
H
L
L
L
L
L
L
H
L
L
L
H
H
H
H
H
L
H
H
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
x
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
x
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
x
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
x
H
H
L
0
1
2
3
4
5
6
7
8
9
H
H
H
H
H
H
H
L
TL/F/5373–1
Order Number MM54HC4511 or MM74HC4511
L
L
L
L
L
*
e
e
x
Don’t care
Depends upon the BCD code applied during the 0 to 1 transition of LE.
*
C
1995 National Semiconductor Corporation
TL/F/5373
RRD-B30M105/Printed in U. S. A.