September 1983
Revised February 1999
MM74HC161 • MM74HC163
Synchronous Binary Counter with Asynchronous Clear
• Synchronous Binary Counter with Synchronous Clear
The MM74HC161 counter is cleared asynchronously.
When the CLEAR is taken LOW the counter is cleared
immediately regardless of the CLOCK.
General Description
The MM74HC161 and MM74HC163 synchronous presetta-
ble counters utilize advanced silicon-gate CMOS technol-
Two active HIGH enable inputs (ENP and ENT) and a RIP-
ogy and internal look-ahead carry logic for use in high
PLE CARRY (RC) output are provided to enable easy cas-
speed counting applications. They offer the high noise
cading of counters. Both ENABLE inputs must be HIGH to
immunity and low power consumption inherent to CMOS
count. The ENT input also enables the RC output. When
with speeds similar to low power Schottky TTL. The HC161
enabled, the RC outputs a positive pulse when the counter
and the HC163 are 4 bit binary counters. All flip-flops are
overflows. This pulse is approximately equal in duration to
clocked simultaneously on the LOW-to-HIGH transition
the HIGH level portion of the QA output. The RC output is
(positive edge) of the CLOCK input waveform.
fed to successive cascaded stages to facilitate easy imple-
mentation of N-bit counters.
These counters may be preset using the LOAD input. Pre-
setting of all four flip-flops is synchronous to the rising edge
of CLOCK. When LOAD is held LOW counting is disabled
and the data on the A, B, C, and D inputs is loaded into the
All inputs are protected from damage due to static dis-
charge by diodes to VCC and ground.
counter on the rising edge of CLOCK. If the load input is
taken HIGH before the positive edge of CLOCK the count
operation will be unaffected.
Features
■ Typical operating frequency: 40 MHz
All of these counters may be cleared by utilizing the
■ Typical propagation delay; clock to Q: 18 ns
CLEAR input. The clear function on the MM74HC163
■ Low quiescent current: 80 µA maximum (74HC Series)
counter is synchronous to the clock. That is, the counters
■ Low input current: 1 µA maximum
■ Wide power supply range: 2–6V
are cleared on the positive edge of CLOCK while the clear
input is held LOW.
Ordering Code:
Order Number Package Number
Package Description
MM74HC161M
MM74HC161SJ
MM74HC161MTC
MM74HC161N
MM74HC163M
MM74HC163SJ
MM74HC163MTC
MM74HC163N
M16A
M16D
MTC16
N16E
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
M16A
M16D
MTC16
N16E
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 1999 Fairchild Semiconductor Corporation
DS005008.prf
www.fairchildsemi.com