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MM74HC148N PDF预览

MM74HC148N

更新时间: 2024-11-23 22:46:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 运算电路逻辑集成电路光电二极管编码器
页数 文件大小 规格书
8页 79K
描述
8-3 Line Priority Encoder

MM74HC148N 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:0.300 INCH, PLASTIC, MS-001, DIP-16针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.71Is Samacsys:N
其他特性:8 TO 3 LINE PRIORITY ENCODER系列:HC/UH
JESD-30 代码:R-PDIP-T16长度:19.305 mm
逻辑集成电路类型:ENCODER位数:8
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/6 V传播延迟(tpd):175 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Arithmetic Circuits最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

MM74HC148N 数据手册

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October 1987  
Revised February 1999  
MM74HC148  
8-3 Line Priority Encoder  
external circuitry. All data inputs and outputs are active at  
the low logic level.  
General Description  
The MM74HC148 priority encoder utilizes advanced sili-  
con-gate CMOS technology. It has the high noise immunity  
and low power consumption typical of CMOS circuits, as  
well as the speeds and output drive similar to LB-TTL.  
All inputs are protected from damage due to static dis-  
charge by internal diode clamps to VCC and ground.  
Features  
Typical propagation delay: 13 ns  
This priority encoder accepts 8 input request lines 0–7 and  
outputs 3 lines A0–A2. The priority encoding ensures that  
only the highest order data line is encoded. Cascading cir-  
cuitry (enable input EI and enable output EO) has been  
provided to allow octal expansion without the need for  
Wide supply voltage range: 2V–6V  
Ordering Code:  
Order Number Package Number  
Package Description  
MM74HC148M  
MM74HC148MTC  
MM74HC148N  
M16A  
MTC16  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Truth Table  
Inputs  
Outputs  
Pin Assignments for DIP, SOIC and TSSOP  
EI  
H
L
L
L
L
L
L
L
L
L
0
X
H
X
X
X
X
X
X
X
L
1
X
H
X
X
X
X
X
X
L
2
X
H
X
X
X
X
X
L
3
X
H
X
X
X
X
L
4
X
H
X
X
X
L
5
X
H
X
X
L
6
X
H
X
L
7
X
H
L
A2 A1 A0 GS EO  
H
H
L
H
H
L
H
H
L
H
H
L
L
L
L
L
L
L
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
L
H
H
H
H
H
H
H = HIGH  
L = LOW  
X = Irrelevant  
© 1999 Fairchild Semiconductor Corporation  
DS009390.prf  
www.fairchildsemi.com  

MM74HC148N 替代型号

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