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MM74HC14N_NL PDF预览

MM74HC14N_NL

更新时间: 2024-11-23 21:54:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
8页 116K
描述
Hex Inverting Schmitt Trigger

MM74HC14N_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.11
系列:HC/UHJESD-30 代码:R-PDIP-T14
JESD-609代码:e3长度:19.18 mm
负载电容(CL):50 pF逻辑集成电路类型:INVERTER
最大I(ol):0.004 A功能数量:6
输入次数:1端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE包装方法:RAIL
峰值回流温度(摄氏度):NOT APPLICABLE电源:2/6 V
Prop。Delay @ Nom-Sup:38 ns传播延迟(tpd):156 ns
认证状态:Not Qualified施密特触发器:YES
座面最大高度:5.08 mm子类别:Gates
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT APPLICABLE宽度:7.62 mm
Base Number Matches:1

MM74HC14N_NL 数据手册

 浏览型号MM74HC14N_NL的Datasheet PDF文件第2页浏览型号MM74HC14N_NL的Datasheet PDF文件第3页浏览型号MM74HC14N_NL的Datasheet PDF文件第4页浏览型号MM74HC14N_NL的Datasheet PDF文件第5页浏览型号MM74HC14N_NL的Datasheet PDF文件第6页浏览型号MM74HC14N_NL的Datasheet PDF文件第7页 
September 1983  
Revised May 2005  
MM74HC14  
Hex Inverting Schmitt Trigger  
General Description  
Features  
The MM74HC14 utilizes advanced silicon-gate CMOS  
technology to achieve the low power dissipation and high  
noise immunity of standard CMOS, as well as the capability  
to drive 10 LS-TTL loads.  
Typical propagation delay: 13 ns  
Wide power supply range: 2–6V  
Low quiescent current: 20 A maximum (74HC Series)  
Low input current: 1 A maximum  
The 74HC logic family is functionally and pinout compatible  
with the standard 74LS logic family. All inputs are protected  
from damage due to static discharge by internal diode  
clamps to VCC and ground.  
Fanout of 10 LS-TTL loads  
Typical hysteresis voltage: 0.9V at VCC 4.5V  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
MM74HC14M  
M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
MM74HC14MX_NL  
MM74HC14SJ  
MM74HC14MTC  
MM74HC14MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
MM74HC14N  
N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
MM74HC14N_NL  
N14A Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Connection Diagram  
Logic Diagram  
Pin Assignments for DIP, SOIC, SOP and TSSOP  
Top View  
© 2005 Fairchild Semiconductor Corporation  
DS005105  
www.fairchildsemi.com  

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