5秒后页面跳转
MM74C175J PDF预览

MM74C175J

更新时间: 2024-09-28 04:31:07
品牌 Logo 应用领域
德州仪器 - TI 输出元件逻辑集成电路触发器
页数 文件大小 规格书
6页 324K
描述
CMOS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, CERAMIC, DIP-16

MM74C175J 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP16,.3Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.76
系列:CMOSJESD-30 代码:R-GDIP-T16
JESD-609代码:e0长度:19.43 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:2000000 Hz最大I(ol):0.00036 A
位数:4功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:5/15 V
传播延迟(tpd):300 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:FF/Latches
最大供电电压 (Vsup):15 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:5 MHzBase Number Matches:1

MM74C175J 数据手册

 浏览型号MM74C175J的Datasheet PDF文件第2页浏览型号MM74C175J的Datasheet PDF文件第3页浏览型号MM74C175J的Datasheet PDF文件第4页浏览型号MM74C175J的Datasheet PDF文件第5页浏览型号MM74C175J的Datasheet PDF文件第6页 
February 1988  
MM54C175/MM74C175 Quad D Flip-Flop  
General Description  
The MM54C175/MM74C175 consists of four positive-edge  
All inputs are protected from static discharge by diode  
clamps to V and GND.  
triggered type flip-flops implemented with monolithic  
D
CC  
CMOS technology. Both are true and complemented out-  
puts from each flip-flop are externally available. All four flip-  
flops are controlled by a common clock and a common  
clear. Information at the D inputs meeting the set-up time  
requirements is transferred to the Q outputs on the positive-  
going edge of the clock pulse. The clearing operation, en-  
abled by a negative pulse at Clear input, clears all four Q  
outputs to logical ‘‘0’’ and Q’s to logical ‘‘1’’.  
Features  
Y
Wide supply voltage range  
Guaranteed noise margin  
High noise immunity  
3V to 15V  
1.0V  
Y
Y
Y
0.45 V  
CC  
(typ.)  
Low power TTL compatibility  
Fan out of 2  
ving 74L  
Connection Diagram & Truth Table  
Dual-In-Line Package  
TL/F/5900–1  
Tiew  
r MM54C175 or MM74C175  
Each Flip-Flop  
Inputs  
Clock  
Outputs  
ar  
D
Q
Q
L
H
H
H
H
X
u
u
H
X
H
L
X
X
L
H
L
NC  
NC  
H
L
H
NC  
NC  
L
e
e
e
H
L
High level  
Low level  
Irrelevant  
X
e
e
Transition from low to high level  
No change  
u
NC  
C
1995 National Semiconductor Corporation  
TL/F/5900  
RRD-B30M105/Printed in U. S. A.  

与MM74C175J相关器件

型号 品牌 获取价格 描述 数据表
MM74C175J/A+ ETC

获取价格

Quad D-Type Flip-Flop
MM74C175M FAIRCHILD

获取价格

Quad D-Type Flip-Flop
MM74C175M ROCHESTER

获取价格

D Flip-Flop, CMOS Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, CM
MM74C175MX ROCHESTER

获取价格

D Flip-Flop, CMOS Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, CM
MM74C175MX FAIRCHILD

获取价格

D Flip-Flop, CMOS Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, CM
MM74C175N FAIRCHILD

获取价格

Quad D-Type Flip-Flop
MM74C175N/A+ ETC

获取价格

Quad D-Type Flip-Flop
MM74C175N/B+ ETC

获取价格

Quad D-Type Flip-Flop
MM74C192 FAIRCHILD

获取价格

Synchronous 4-Bit Up/Down Decade Counter . Synchronous 4-Bit Up/Down Binary Counter
MM74C192 NSC

获取价格

Synchronous 4-Bit Up/Down Decade Counter