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MM74C192 PDF预览

MM74C192

更新时间: 2024-09-26 22:46:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 计数器
页数 文件大小 规格书
6页 66K
描述
Synchronous 4-Bit Up/Down Decade Counter . Synchronous 4-Bit Up/Down Binary Counter

MM74C192 数据手册

 浏览型号MM74C192的Datasheet PDF文件第2页浏览型号MM74C192的Datasheet PDF文件第3页浏览型号MM74C192的Datasheet PDF文件第4页浏览型号MM74C192的Datasheet PDF文件第5页浏览型号MM74C192的Datasheet PDF文件第6页 
January 1991  
Revised October 1999  
MM74C192 • MM74C193  
Synchronous 4-Bit Up/Down Decade Counter •  
Synchronous 4-Bit Up/Down Binary Counter  
General Description  
The MM74C192 and MM74C193 up/down counters are  
Features  
High noise margin: 1V guaranteed  
Tenth power TTL compatible: Drive 2 LPTTL loads  
Wide supply range: 3V to 15V  
monolithic complementary MOS (CMOS) integrated cir-  
cuits. The MM74C192 is  
a BCD counter, while the  
MM74C193 is a binary counter.  
Carry and borrow outputs for N-bit cascading  
Asynchronous clear  
Counting up and counting down is performed by two count  
inputs, one being held high while the other is clocked. The  
outputs change on the positive-going transition of this  
clock.  
High noise immunity: 0.45 VCC (typ.)  
These counters feature preset inputs that are set when  
load is a logical “0” and a clear which forces all outputs to  
“0” when it is at a logical “1”. The counters also have carry  
and borrow outputs so that they can be cascaded using no  
external circuitry.  
Ordering Code:  
Order Number Package Number  
Package Description  
MM74C192N  
MM74C193M  
MM74C193N  
N16E  
M16A  
N16E  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Top View  
© 1999 Fairchild Semiconductor Corporation  
DS005901  
www.fairchildsemi.com  

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