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MM54HC138J PDF预览

MM54HC138J

更新时间: 2024-11-24 14:43:35
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 驱动输入元件逻辑集成电路
页数 文件大小 规格书
4页 114K
描述
Decoder/Driver, HC/UH Series, Inverted Output, CMOS, CDIP16, DIP-16

MM54HC138J 技术参数

生命周期:Contact Manufacturer包装说明:DIP,
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.7
其他特性:3 ENABLE INPUTS系列:HC/UH
输入调节:STANDARDJESD-30 代码:R-GDIP-T16
长度:19.43 mm逻辑集成电路类型:OTHER DECODER/DRIVER
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:INVERTED封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE传播延迟(tpd):298 ns
座面最大高度:5.08 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mmBase Number Matches:1

MM54HC138J 数据手册

 浏览型号MM54HC138J的Datasheet PDF文件第2页浏览型号MM54HC138J的Datasheet PDF文件第3页浏览型号MM54HC138J的Datasheet PDF文件第4页 
January 1988  
MM54HC138/MM74HC138  
3-to-8 Line Decoder  
General Description  
This decoder utilizes advanced silicon-gate CMOS technol-  
ogy, and is well suited to memory address decoding or data  
routing applications. The circuit features high noise immuni-  
ty and low power consumption usually associated with  
CMOS circuitry, yet has speeds comparable to low power  
Schottky TTL logic.  
The decoder’s outputs can drive 10 low power Schottky TTL  
equivalent loads, and are functionally and pin equivalent to  
the 54LS138/74LS138. All inputs are protected from dam-  
age due to static discharge by diodes to V  
and ground.  
CC  
Features  
Y
The MM54HC138/MM74HC138 has 3 binary select inputs  
(A, B, and C). If the device is enabled these inputs deter-  
mine which one of the eight normally high outputs will go  
low. Two active low and one active high enables (G1, G2A  
and G2B) are provided to ease the cascading of decoders.  
Typical propagation delay: 20 ns  
Y
Wide power supply range: 2V6V  
Y
Low quiescent current: 80 mA maximum (74HC Series)  
Low input current: 1 mA maximum  
Y
Y
Fanout of 10 LS-TTL loads  
Connection and Logic Diagrams  
Dual-In-Line Package  
TL/F/5120–1  
Order Number MM54HC138  
or MM74HC138  
TL/F/5120–2  
Truth Table  
Inputs  
Outputs  
Enable  
Select  
G1 G2*  
C
B
A
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7  
X
L
H
X
L
L
L
L
L
L
L
L
X
X
L
X
X
L
X
X
L
H
L
H
L
H
L
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
H
H
H
H
e
a
* G2 G2A G2B  
e
e e  
high level, L low level, X don’t care  
H
C
1995 National Semiconductor Corporation  
TL/F/5120  
RRD-B30M105/Printed in U. S. A.  

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