Datasheet > MM54C157J

MM54C157J

更新时间： 2024-11-14 22:46:07

品牌	Logo	应用领域
美国国家半导体 - NSC		复用器逻辑集成电路
页数	文件大小	规格书
4页	103K
描述
Quad 2-Input Multiplexers

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MM54C157J 数据手册

February 1988

MM54C157/MM74C157 Quad 2-Input Multiplexers

General Description

Features

Supply voltage range

3V to 15V

0.45 V (typ.)

These multiplexers are monolithic complementary MOS

(CMOS) integrated circuits constructed with N- and P-chan-

nel enhancement transistors. They consist of four 2-input

multiplexers with common select and enable inputs. When

the enable input is at logical ‘‘0’’ the four outputs assume

the values as selected from the inputs. When the enable

input is at logical ‘‘1’’, the outputs assume logical ‘‘0’’. Se-

lect decoding is done internally resulting in a single select

input only.

High noise immunity

Low power

50 nW (typ.)

Tenth power TTL compatible

Drive 2 LPTTL loads

Logic & Connection Diagrams

Dual-In-Line Package

TL/F/5894–2

Top View

Order Number MM54C157 or MM74C157

TL/F/5894–1

Guaranteed Noise Margin

as a Function of V

Truth Table

Enable

Select

Output Y

74L Compatibility

TL/F/5894–4

TL/F/5894–3

1995 National Semiconductor Corporation

TL/F/5894

RRD-B30M105/Printed in U. S. A.

12 3 4

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