MM54C08F

更新时间： 2024-11-15 13:11:39

品牌	Logo	应用领域
美国国家半导体 - NSC		栅
页数	文件大小	规格书
4页	104K
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MM54C08F 数据手册

February 1988

MM54C08/MM74C08 Quad 2-Input AND Gate

General Description

Features

Wide supply voltage range

3.0V to 15V

1.0V

Employing complementary MOS (CMOS) transistors to

achieve wide power supply operating range, low power con-

sumption and high noise margin, these gates provide basic

functions used in the implementation of digital integrated

circuit systems. The N- and P-channel enhancement mode

transistors provide a symmetrical circuit with output swing

essentially equal to the supply voltage. No DC power other

than that caused by leakage current is consumed during

static condition. All inputs are protected from damage due

Guaranteed noise margin

High noise immunity

0.45 V (typ.)

Low power

TTL compatibility

Fan out of 2

driving 74L

Low power consumption

10 nW/package (typ.)

to static discharge by diode clamps to V

and GND.

Connection Diagram and Truth Table

Dual-In-Line Package

TL/F/5878–1

Top View

Order Number MM54C08 or MM74C08

Inputs

Outputs

Low Level

High Level

1995 National Semiconductor Corporation

TL/F/5878

RRD-B30M105/Printed in U. S. A.

12 3 4

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