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MK74CB177RTRLF PDF预览

MK74CB177RTRLF

更新时间: 2024-11-25 14:53:43
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
4页 48K
描述
Low Skew Clock Driver, CB Series, 7 True Output(s), 0 Inverted Output(s), PDSO28, 0.150 INCH, SSOP-28

MK74CB177RTRLF 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP,针数:28
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.84Is Samacsys:N
其他特性:ALSO OPERATABLE AT 3.3V NOM系列:CB
输入调节:STANDARDJESD-30 代码:R-PDSO-G28
JESD-609代码:e3长度:9.9 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER功能数量:2
反相输出次数:端子数量:28
实输出次数:7最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):6.5 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.5 ns座面最大高度:1.75 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.9116 mmBase Number Matches:1

MK74CB177RTRLF 数据手册

 浏览型号MK74CB177RTRLF的Datasheet PDF文件第2页浏览型号MK74CB177RTRLF的Datasheet PDF文件第3页浏览型号MK74CB177RTRLF的Datasheet PDF文件第4页 
MK74CB177  
OPTi Buffalo™ Clock Driver  
ICRO CLOC K  
Description  
Features  
The MK74CB177 OPTi Buffalo™ is a monolithic high  
speed clock driver which is ideal for Pentium™ systems which  
use OPTis Viper N chip set. It consists of three clock drivers  
capable of accepting different inputs to produce one, seven and  
eight low-skew, non-inverting outputs. The single  
input/output is used to maintain timing with the early CPU  
clock. The special power down pin allows for the main PCI  
drivers to be stopped for OPTi’s low power mode. When  
combined with MicroClock’s MK1438 or other low jitter  
clock synthesizer, the two chips form an unequaled high  
performance clocking scheme for new processors. This chip  
combines low jitter clocks with high fanout and mixed 3.3/5V  
outputs for easy system design.  
• Tiny 28 pin SSOP (150 mil) package  
• Single input to single output for early clock  
• Single input to seven output for CPU  
• Single input to eight output for PCI  
• Like outputs are skew matched to within 250ps  
• A, B, and C outputs matched to 500ps  
• 3.3V±10% and/or 5V±10% supply voltage  
• Power Down stops seven A clock outputs  
• Each side (A, B+C) of eight clock drivers can run  
from different supply voltages, making it possible  
to have 3.3V and 5V amplitude clock outputs  
from the same chip  
Many new Pentium systems require multiple outputs for CPU  
and PCI clocks, plus an early CPU clock for the core logic.  
This monolithic solution eliminates any concern for part-to-  
part skew matching. The MK74CB177 is packaged in the tiny  
28 pin SSOP, which uses the same board space as the narrow  
16 pin SOIC. An added feature of the chip is the ability to  
produce both 3.3V and 5V amplitude clocks by connecting 5V  
to VDDA and 3.3V to VDDBC. See MAN03 for dual voltage  
operation.  
• Clock speeds up to 66.67 MHz  
Family of MicroClock Parts  
The MK74CB177 OPTi Buffalo™ is designed to  
be used with MicroClock’s clock synthesizer  
devices, which will produce the CPU, memory,  
and local bus clocks. MicroClock also makes the  
MK74CB216 and MK74CB178 clock buffers.  
Consult MicroClock for applications support.  
Block Diagram  
VDDA  
VDDB  
INA  
QA0  
INB  
QB0  
QA1  
QA2  
QB1  
QB2  
QB3  
QB4  
QB5  
QA3  
QA4  
QA5  
QA6  
QB6  
QC0  
INC  
PDA06 (QA0-QA6)  
QA7  
GNDB  
GNDA  
MDS74CB177B  
1
Revision 3038  
Printed 3/3/98  
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax  

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