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MK2744-10STRLF PDF预览

MK2744-10STRLF

更新时间: 2024-11-22 07:52:55
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
4页 44K
描述
Video Clock Generator, 81MHz, CMOS, PDSO16, 0.150 INCH, SOIC-16

MK2744-10STRLF 数据手册

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MK2744  
MPEG/Set-Top Clock Source  
ICRO CLOC K  
Description  
Features  
The MK2744 is a low cost, low jitter, high  
performance clock synthesizer for MPEG I,  
MPEG II, and set-top box based applications.  
Using analog Phase-Locked Loop (PLL)  
techniques, the device accepts a 27.00MHz  
fundamental mode crystal or clock input to  
produce multiple output clocks including the  
processor clock, 27MHz, 3.6864MHz, and a  
selectable audio clock. The audio clocks are  
exactly frequency locked to the 27.00MHz input  
with zero ppm error, allowing audio and video to  
track exactly, thereby eliminating the need for  
large buffer memory.  
• Packaged in 16 pin narrow (150 mil) SOIC  
• Zero ppm audio clock error for 256X and 384X  
• Selectable audio sampling frequencies support  
32 kHz, 44.1 kHz, and 48 kHz in most DACs  
• 27.00 MHz fundamental crystal or clock input  
• Selectable processor frequencies  
• Fixed clocks of 27, and 3.6864 or 33MHz  
• Zero ppm error in 3.686 MHz clock  
• 25mA output drive capability at TTL levels  
• Advanced, low power, sub-micron CMOS process  
• 5V±10% operating voltage  
MicroClock manufactures the largest variety of  
Set-Top Box and multimedia clock synthesizers  
for all applications. Consult MicroClock to  
eliminate crystals and oscillators from your board.  
• See also the MK2712 for NTSC/PAL clocks  
Block Diagram  
VDD  
GND  
2
2
3
3
Output  
Buffer  
Audio Clock  
AS2:0  
PS2:0  
Clock Synthesis  
and Control  
Circuitry  
Output  
Buffer  
3.6864MHz or  
33.00 MHz  
27.00 MHz  
Output  
Buffer  
Processor Clock  
clock or  
crystal  
X1  
Clock  
Buffer/  
Crystal  
Output  
Buffer  
27 MHz  
Oscillator  
X2  
MDS2744D  
1
Revision 9297  
Printed 12/4/97  
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax  

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