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MK21DX128VLK5 PDF预览

MK21DX128VLK5

更新时间: 2024-09-25 12:10:31
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飞思卡尔 - FREESCALE /
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55页 1740K
描述
K21 Sub-Family Data Sheet

MK21DX128VLK5 数据手册

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Document Number: K21P80M50SF4  
Rev. 3, 08/2012  
Freescale Semiconductor  
Data Sheet: Advance Information  
K21P80M50SF4  
K21 Sub-Family Data Sheet  
Supports the following:  
MK21DX128VLK5, MK21DX256VLK5,  
MK21DN512VLK5  
Features  
Human-machine interface  
– General-purpose input/output  
Operating Characteristics  
– Voltage range: 1.71 to 3.6 V  
– Flash write voltage range: 1.71 to 3.6 V  
– Temperature range (ambient): -40 to 105°C  
Analog modules  
– 16-bit SAR ADC  
– Two analog comparators (CMP) containing a 6-bit  
DAC and programmable reference input  
Performance  
– Up to 50 MHz ARM Cortex-M4 core with DSP  
instructions delivering 1.25 Dhrystone MIPS per  
MHz  
Timers  
– Programmable delay block  
– Two 2-channel general purpose timers, one with  
quadrature decoder functionality  
– Periodic interrupt timers  
– 16-bit low-power timer  
– Carrier modulator transmitter  
– Real-time clock  
Memories and memory interfaces  
– Up to 512 KB of program flash for devices without  
FlexNVM.  
– Up to 256 KB program flash for devices with  
FlexNVM.  
– 64 KB FlexNVM on FlexMemory devices  
– 4 KB FlexRAM on FlexMemory devices  
– Up to 64 KB RAM  
Communication interfaces  
– USB full-/low-speed On-the-Go controller with on-  
chip transceiver  
– Serial programming interface (EzPort)  
– Two SPI modules  
Clocks  
– Two I2C modules  
– Four UART modules  
– I2S module  
– 3 to 32 MHz crystal oscillator  
– 32 kHz crystal oscillator  
– Multi-purpose clock generator  
System peripherals  
– Multiple low-power modes to provide power  
optimization based on application requirements  
– External watchdog monitor  
– Software watchdog  
– Low-leakage wakeup unit  
Security and integrity modules  
– Hardware CRC module to support fast cyclic  
redundancy checks  
– Tamper detect and secure storage  
– Hardware random-number generator  
– Hardware encryption supporting DES, 3DES, AES,  
MD5, SHA-1, and SHA-256 algorithms  
– 128-bit unique identification (ID) number per chip  
This document contains information on a new product. Specifications and  
information herein are subject to change without notice.  
© 2012–2013 Freescale Semiconductor, Inc.  

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